公开(公告)号：USD1025092S1

公开(公告)日：2024-04-30

申请号：US29826425

申请日：2022-02-11

Applicant: LG DISPLAY CO., LTD.

Designer： Byeongseong So

Abstract: FIG. 1 is a front view of a display panel with graphical user interface showing my new design; and,
FIG. 2 is an enlarged view of a portion of FIG. 1.
The broken lines depict portions of the display panel with graphical user interface that form no part of the claimed design.

公开(公告)号：USD983182S1

公开(公告)日：2023-04-11

申请号：US29776190

申请日：2021-03-29

Applicant: LG DISPLAY CO., LTD.

Designer： Byeongseong So

公开(公告)号：US10446070B2

公开(公告)日：2019-10-15

申请号：US14818761

申请日：2015-08-05

Applicant: LG Display Co., Ltd.

Inventor： Jiah Kim ,  Juyoung Lee ,  Byeongseong So ,  Seungjun Lee

IPC: G09G3/20 ,  G09G3/3266 ,  G09G3/36 ,  G11C19/28

Abstract: Provided are a display device, a scan driver, and a method of manufacturing the same. A scan driver includes: a level shifter configured to output a power and a signal, and a scan signal generating circuit configured to generate a scan signal based on the power and the signal supplied from the level shifter, the scan signal generating circuit including a buffer configured to transmit a clock signal to a stage of a shift register, the buffer including two inverters, one of the two inverters being included in a multi-buffer.

公开(公告)号：USD975696S1

公开(公告)日：2023-01-17

申请号：US29825631

申请日：2022-02-03

Applicant: LG DISPLAY CO., LTD.

Designer： Byeongseong So

公开(公告)号：US11195472B2

公开(公告)日：2021-12-07

申请号：US17091810

申请日：2020-11-06

Applicant: LG Display Co., Ltd.

Inventor： Youngsung Cho ,  Byeongseong So ,  Hyunguk Jang

IPC: G09G3/3233 ,  G09G3/3266

Abstract: A display device includes a display panel, a data driving circuit, a gate driving circuit, and a timing controller, each pixel of the display panel includes a light-emitting diode, a driving transistor, second to sixth switching transistors, and a storage capacitor, and at a sensing step at which the light-emitting diode does not emit light, a conduction path that is connected through the sixth switching transistor, the driving transistor, the second switching transistor, and the third switching transistor is formed, and an electrical signal reflecting a threshold voltage of one of the second to fourth switching transistors is transferred to a data line through the conduction path.

公开(公告)号：US10248239B2

公开(公告)日：2019-04-02

申请号：US15630182

申请日：2017-06-22

Applicant: LG Display Co., Ltd.

Inventor： Byeongseong So ,  Kyujin Kim ,  Taehun Kim ,  Seungjin Yoo

IPC: G06F3/041 ,  G02F1/1333 ,  G09G3/36 ,  G06F3/044 ,  G02F1/1343 ,  G09G3/20 ,  G11C19/28

Abstract: A touch sensor integrated type display device includes: a display panel including: pixels connected to data lines and gate lines and division-driven into a plurality of panel blocks, and a plurality of touch sensors connected to the pixels, a display driving circuit providing data of an input image to the pixels in multiple display periods divided from one frame period, and a touch sensing circuit driving the touch sensors and sensing a touch input in a touch sensing period allocated between the display periods of the frame period, adjacent panel blocks being division-driven in the display periods that are separated from each other with the touch sensing period, in which the touch sensors are driven, interposed therebetween, the display driving circuit including a shift register: shifting a gate pulse in accordance with a shift clock timing, and sequentially supplying the gate pulse to the gate lines.

公开(公告)号：US20140152935A1

公开(公告)日：2014-06-05

申请号：US14082022

申请日：2013-11-15

Applicant: LG Display Co., Ltd.

Inventor： Seungho Heo ,  Byeongseong So

IPC: G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/13454 ,  G02F1/1339 ,  G02F2001/134372 ,  G02F2201/121 ,  G02F2202/16

Abstract: The present disclosure relates to reducing bezel area of a flat display panel comprising a substrate with a non-display area surrounding a display area, the display area comprising common lines coupled to corresponding rows of pixels; and a gate driver formed in the non-display area. The display may further include a conductive sealing region formed in the non-display area and configured to supply a common line voltage; and a plurality of common pads formed within the conductive sealing region and each coupled to a corresponding one of the common lines to apply a common line voltage to the rows of pixels. Alternatively, the display may further include a vertical common line formed in the non-display area between the gate driver and the display area, the vertical common line extending from top to bottom of the non-display area and coupled to said common lines to apply a common voltage.

Abstract translation: 本公开涉及减少包括具有围绕显示区域的非显示区域的基板的平面显示面板的边框区域，所述显示区域包括耦合到相应行像素的公共线; 以及形成在非显示区域中的栅极驱动器。 显示器还可以包括形成在非显示区域中并被配置为提供公共线电压的导电密封区域; 以及多个公共焊盘，其形成在导电密封区域内并且各自耦合到对应的一条公共线，以将公共线电压施加到像素行。 或者，显示器还可以包括形成在栅极驱动器和显示区域之间的非显示区域中的垂直公共线，垂直公共线从非显示区域的顶部延伸到底部并且耦合到所述公共线以应用 一个共同的电压。

公开(公告)号：USD1025091S1

公开(公告)日：2024-04-30

申请号：US29826380

申请日：2022-02-11

Applicant: LG DISPLAY CO., LTD.

Designer： Byeongseong So

Abstract: FIG. 1 is a front view of a display panel with graphical user interface showing my new design in a first state;
FIG. 2 is a front view thereof in a second state;
FIG. 3 is a front view thereof in a third state; and,
FIG. 4 is an enlarged view of a portion of FIG. 3.
The broken lines depict portions of the display panel with graphical user interface that form no part of the claimed design.
The appearance of the transitional image sequentially transitions between the images shown in FIGS. 1-3. The process or period in which one image transitions to another image forms no part of the claimed design.

公开(公告)号：USD980224S1

公开(公告)日：2023-03-07

申请号：US29776279

申请日：2021-03-29

Applicant: LG DISPLAY CO., LTD.

Designer： Byeongseong So

公开(公告)号：US10319284B2

公开(公告)日：2019-06-11

申请号：US15630136

申请日：2017-06-22

Applicant: LG Display Co., Ltd.

Inventor： Byeongseong So ,  Youngsung Cho

IPC: G09G3/20 ,  G09G3/3266 ,  G09G3/36

Abstract: A display device includes: a pixel array including pixels at intersections of data lines and gate lines, a shift register including stages connected as a cascade, the shift register sequentially supplying gate pulses to the gate lines, and a node controller controlling nodes in the shift register, a first stage including: a pull-up transistor charging the output based on a Q node for a first gate pulse, a pull-down transistor discharging the output to a gate-low voltage based on a QB node voltage, a start controller pre-charging the Q node, and a QB node discharge controller discharging the QB node to a first low-potential voltage based on a first reset signal input line (IL), the node controller including a first reset signal generator that, during a vertical blanking interval of each frame, charges the first reset signal IL in response to a turn-on voltage applied to a gate-low voltage IL.