公开(公告)号：US11875751B2

公开(公告)日：2024-01-16

申请号：US17943779

申请日：2022-09-13

Applicant: LG DISPLAY CO., LTD.

Inventor： Soon-Dong Cho ,  Jung-Jae Kim ,  Min-Gyu Park ,  Jae-Won Han ,  Dong-Won Park

IPC: G09G3/3266 ,  G09G3/3275

CPC classification number: G09G3/3266 ,  G09G3/3275 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2310/08 ,  G09G2370/00

Abstract: A display device includes a display panel including pixels, and data lines and gate lines connected to the pixels, a timing controller configured to output source driving bit information and gate driving bit information through an intra-interface signal, a source driver configured to generate data driving signal based on the source driving bit information and to supply the data driving signal to the data lines, and a gate driver configured to generate a gate driving signal based on the gate driving bit information and to supply the gate driving signal to the gate lines, wherein the intra-interface signal is configured with predetermined data transmission units and includes both the source driving bit information and the gate driving bit information every 1 data transmission unit.

公开(公告)号：US10726787B2

公开(公告)日：2020-07-28

申请号：US16213907

申请日：2018-12-07

Applicant: LG Display Co., Ltd.

Inventor： Soon-Dong Cho ,  Jae-Won Han ,  Jun-O Hur ,  Dong-Ju Kim

IPC: G09G3/3258 ,  G09G3/3291 ,  G09G3/3275 ,  G09G3/3266 ,  G09G3/36 ,  G02F1/1345

Abstract: A chip on film and a display device including the same selectively outputs gate transmission signals and data outputs to reduce the number of output pads in a data driving IC. The COF includes first to third groups of data input pads, gate input pads, and output pads. A data driving IC includes first to third groups of output buffers, a first switchable output unit configured to selectively supply gate transmission signals and an output of the first group of output buffers to the first group of output pads, and a second switchable output unit configured to selectively supply the gate transmission signals and an output of the third group of output buffers to the third group of output pads. An output of the second group of output buffers is supplied to the second group of output pads between the first and the third groups of output pads.

公开(公告)号：US10726766B2

公开(公告)日：2020-07-28

申请号：US16198131

申请日：2018-11-21

Applicant: LG Display Co., Ltd.

Inventor： Soon-Dong Cho ,  Jung-Jae Kim ,  Jae-Won Han ,  Hyung-Jin Choe

IPC: G09G3/20 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/36

Abstract: Disclosed herein are a display device capable of reducing the number of transmission lines by enabling a master circuit to perform communication with a plurality of slave circuits, which utilize different interfaces, through a common transmission line in a time divisional manner, and an interface method thereof. A timing controller uses a common transmission line of a gamma voltage generator and a level shifter which respectively utilize first and second interfaces and perform communication using the first and second interfaces in a time divisional manner.

公开(公告)号：US20190164470A1

公开(公告)日：2019-05-30

申请号：US16198131

申请日：2018-11-21

Applicant: LG Display Co., Ltd.

Inventor： Soon-Dong Cho ,  Jung-Jae Kim ,  Jae-Won Han ,  Hyung-Jin Choe

IPC: G09G3/20 ,  G09G3/3266

CPC classification number: G09G3/2096 ,  G09G3/2092 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0673 ,  G09G2330/028 ,  G09G2370/08

Abstract: Disclosed herein are a display device capable of reducing the number of transmission lines by enabling a master circuit to perform communication with a plurality of slave circuits, which utilize different interfaces, through a common transmission line in a time divisional manner, and an interface method thereof. A timing controller uses a common transmission line of a gamma voltage generator and a level shifter which respectively utilize first and second interfaces and perform communication using the first and second interfaces in a time divisional manner.

公开(公告)号：US11475843B2

公开(公告)日：2022-10-18

申请号：US17124116

申请日：2020-12-16

Applicant: LG Display Co., Ltd.

Inventor： Soon-Dong Cho ,  Jung-Jae Kim ,  Min-Gyu Park ,  Jae-Won Han ,  Dong-Won Park

IPC: G09G3/3266 ,  G09G3/3275

Abstract: A display device includes a display panel including pixels, and data lines and gate lines connected to the pixels, a timing controller configured to output source driving bit information and gate driving bit information through an intra-interface signal, a source driver configured to generate data driving signal based on the source driving bit information and to supply the data driving signal to the data lines, and a gate driver configured to generate a gate driving signal based on the gate driving bit information and to supply the gate driving signal to the gate lines, wherein the intra-interface signal is configured with predetermined data transmission units and includes both the source driving bit information and the gate driving bit information every 1 data transmission unit.