公开(公告)号：US09628308B2

公开(公告)日：2017-04-18

申请号：US14920887

申请日：2015-10-23

Applicant: MEDIATEK INC.

Inventor： Khurram Muhammad ,  Dennis Mahoney

IPC: H04L27/28 ,  H04L27/00 ,  H03L7/197

CPC classification number: H04L27/0014 ,  H03L7/1976 ,  H04L2027/0018 ,  H04L2027/0055 ,  H04L2027/0069

Abstract: A circuit includes a frequency generation circuit having a phase locked loop, PLL, arranged to generate a carrier frequency; and a controller operably coupled to the frequency generation circuit and arranged to determine a frequency location of one or more signals output by the frequency generation circuit and provide a control signal thereto to adjust the carrier frequency generated by the frequency generation circuit. The controller is arranged to: cooperate with the PLL to introduce a frequency offset in the generated carrier frequency in a first frequency direction; and introduce a compensating frequency offset in a baseband transmit signal in a second frequency direction opposite to the first frequency direction.

公开(公告)号：US20160127160A1

公开(公告)日：2016-05-05

申请号：US14920887

申请日：2015-10-23

Applicant: MEDIATEK INC.

Inventor： Khurram Muhammad ,  Dennis Mahoney

IPC: H04L27/00

CPC classification number: H04L27/0014 ,  H03L7/1976 ,  H04L2027/0018 ,  H04L2027/0055 ,  H04L2027/0069

Abstract: A circuit includes a frequency generation circuit having a phase locked loop, PLL, arranged to generate a carrier frequency; and a controller operably coupled to the frequency generation circuit and arranged to determine a frequency location of one or more signals output by the frequency generation circuit and provide a control signal thereto to adjust the carrier frequency generated by the frequency generation circuit. The controller is arranged to: cooperate with the PLL to introduce a frequency offset in the generated carrier frequency in a first frequency direction; and introduce a compensating frequency offset in a baseband transmit signal in a second frequency direction opposite to the first frequency direction.

Abstract translation: 电路包括频率产生电路，其具有被配置为产生载波频率的锁相环PLL; 以及控制器，其可操作地耦合到所述频率发生电路，并且被布置为确定由所述频率发生电路输出的一个或多个信号的频率位置，并提供其控制信号以调整由所述频率产生电路产生的载波频率。 所述控制器被配置为：与所述PLL配合以在所述生成的载波频率中在第一频率方向上引入频率偏移; 并且在与第一频率方向相反的第二频率方向上的基带发送信号中引入补偿频率偏移。