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15 条记录 (耗时 0.016 秒)

    Digitally-corrected analog-to-digital converters
    2.
    发明授权
    Digitally-corrected analog-to-digital converters 有权
    数字校正模数转换器

    公开(公告)号：US09461660B2

    公开(公告)日：2016-10-04

    申请号：US14938567

    申请日：2015-11-11

    申请人： Mediatek Inc.

    发明人： Khurram Muhammad ,  Chi-Lun Lo ,  Frank Op 't Eynde ,  Michael A. Ashburn, Jr. ,  Tien-Yu Lo

    IPC分类号： H03M1/06 ,  H03M1/12

    CPC分类号： H03M1/0626 ,  H03M1/1255 ,  H03M1/60

    摘要： A method and apparatus for a digitally-corrected analog-to-digital converter (ADC) are disclosed. The apparatus comprises a nonlinearity generator that generates one or more nonlinear characteristics of a time varying input signal and that causes unwanted signal components at frequencies other than a frequency of the time varying input signal, a frequency response modifier coupled to the nonlinearity generator that modifies the unwanted signal components by altering an amplitude of the unwanted signal components, a frequency response compensator coupled to the frequency response modifier, wherein the frequency response compensator compensates for the modification introduced by the frequency response modifier to provide a filtered digital signal, and an inverse nonlinearity generator coupled to the frequency response compensator for receiving the filtered digital signal, wherein the inverse nonlinearity generator compensates for the one or more nonlinear characteristics.

    摘要翻译： 公开了一种用于数字校正的模数转换器（ADC）的方法和装置。 该装置包括非线性发生器，其产生时变输入信号的一个或多个非线性特性，并且在不同于时变输入信号的频率的频率下产生不想要的信号分量，耦合到非线性发生器的频率响应修改器， 通过改变不需要的信号分量的幅度的不需要的信号分量，耦合到频率响应修改器的频率响应补偿器，其中频率响应补偿器补偿由频率响应修改器引入的修改以提供经滤波的数字信号，以及反向非线性 耦合到频率响应补偿器的发生器，用于接收经滤波的数字信号，其中逆非线性发生器补偿一个或多个非线性特性。

    Transmitter circuit, communication unit and method for amplifying a complex quadrature signal
    3.
    发明授权
    Transmitter circuit, communication unit and method for amplifying a complex quadrature signal 有权
    发射机电路，通信单元和放大复数正交信号的方法

    公开(公告)号：US09450798B2

    公开(公告)日：2016-09-20

    申请号：US14923428

    申请日：2015-10-26

    申请人： MEDIATEK INC.

    发明人： Khurram Muhammad ,  Chih-Ming Hung

    IPC分类号： H04L25/49 ,  H04L27/26 ,  H04B1/04

    CPC分类号： H04L27/2623 ,  H03F3/24 ,  H04B1/0475 ,  H04B2001/0408 ,  H04B2001/0491 ,  H04L27/365

    摘要： A transmitter circuit includes a frequency generation circuit configured to generate a local oscillator signal and a digital modulator configured to: receive data to be transmitted; quadrature modulate the received data to at least a first, Q, modulated value and a second, I, modulated value; examine the quadrature modulated data to determine if the first, Q, modulated value exceeds a limit, and in response thereto selectively modify the quadrature modulated values to a first modified, Q′, modulated value and a second modified, I′, modulated value thereby bringing only a value of the first modified, Q′, modulated value to within the limit. A local oscillator phase is selected in order to map the first modified, Q′, modulated value and second modified, I′, modulated value to desired quadrature values. A digital power amplifier, DPA, coupled to the digital quadrature modulator, is configured to amplify the quadrature modified modulated data.

    摘要翻译： 发射机电路包括：频率产生电路，被配置为产生本地振荡器信号;以及数字调制器，被配置为：接收待传输的数据; 将接收的数据正交调制为至少第一调制值和第二调制值; 检查正交调制数据以确定第一Q调制值是否超过限制，并且响应于此，将正交调制值有选择地将正交调制值修改为第一修改后的调制值，调制值和第二修正I'调制值 仅将第一个修改后的Q'调制值的值设置在限制内。 选择本地振荡器相位以便将第一修改的Q'调制值和第二修改的I'调制值映射到期望的正交值。 耦合到数字正交调制器的数字功率放大器DPA被配置为放大正交修改的调制数据。

    SYSTEM AND METHOD FOR MEASURING THE DC-TRANSFER CHARACTERISTIC OF AN ANALOG-TO-DIGITAL CONVERTER
    4.
    发明申请
    SYSTEM AND METHOD FOR MEASURING THE DC-TRANSFER CHARACTERISTIC OF AN ANALOG-TO-DIGITAL CONVERTER 有权
    用于测量模拟数字转换器的直流转换特性的系统和方法

    公开(公告)号：US20160211861A1

    公开(公告)日：2016-07-21

    申请号：US14886545

    申请日：2015-10-19

    申请人： MediaTek Inc.

    发明人： Frank Op 't Eynde ,  Nathan Egan ,  Khurram Muhammad ,  Tien-Yu Lo ,  Chi-Lun Lo ,  Michael A. Ashburn

    IPC分类号： H03M3/00

    CPC分类号： H03M1/109 ,  H03M1/1038 ,  H03M1/12 ,  H03M3/50

    摘要： Systems and methods for measuring and compensating a DC-transfer characteristic of analog-to-digital converters are described. A test-signal generator comprising a sigma-delta modulator may provide calibration signals to an ADC. An output from the ADC may be filtered with a notch filter to suppress quantization noise at discrete frequencies introduced by the sigma-delta modulator. The resulting filtered signal may be compared against an input digital signal to the test-signal generator to determine a transfer characteristic of the ADC.

    摘要翻译： 描述了用于测量和补偿模数转换器的直流传递特性的系统和方法。 包括Σ-Δ调制器的测试信号发生器可以向ADC提供校准信号。 来自ADC的输出可以用陷波滤波器滤波，以抑制由Σ-Δ调制器引入的离散频率的量化噪声。 所得到的滤波信号可以与输入的数字信号与测试信号发生器进行比较，以确定ADC的传输特性。

    Radar Interference Mitigation Method And Apparatus
    9.
    发明申请
    Radar Interference Mitigation Method And Apparatus 审中-公开

    公开(公告)号：US20170219689A1

    公开(公告)日：2017-08-03

    申请号：US15486887

    申请日：2017-04-13

    申请人： MediaTek Inc.

    发明人： Chih-Ming Hung ,  Khurram Muhammad

    IPC分类号： G01S7/02 ,  G01S13/58 ,  G01S7/35

    CPC分类号： G01S7/023 ,  G01S7/35 ,  G01S13/343 ,  G01S13/345 ,  G01S13/584 ,  G01S13/931

    摘要： Methods and apparatuses pertaining to radar interference mitigation are described. A processor associated with an apparatus may generate a plurality of wave frames such that one or more aspects of the plurality of wave frames vary from one wave frame to another wave frame of the plurality of wave frames. Each of the plurality of wave frames may respectively include a plurality of chirps. A wireless transmitter associated with the apparatus may transmit the plurality of wave frames. A wireless receiver associated with the apparatus may receive one or more reflected waves comprising at least a portion of one or more of the wave frames reflected by an object. The processor may determine a distance between the object and the apparatus, a speed of the objet, or both, based on an analysis of the one or more reflected waves.

    Circuit, communication unit and method for VCO frequency adjustment
    10.
    发明授权
    Circuit, communication unit and method for VCO frequency adjustment 有权

    公开(公告)号：US09628308B2

    公开(公告)日：2017-04-18

    申请号：US14920887

    申请日：2015-10-23

    申请人： MEDIATEK INC.

    发明人： Khurram Muhammad ,  Dennis Mahoney

    IPC分类号： H04L27/28 ,  H04L27/00 ,  H03L7/197

    CPC分类号： H04L27/0014 ,  H03L7/1976 ,  H04L2027/0018 ,  H04L2027/0055 ,  H04L2027/0069

    摘要： A circuit includes a frequency generation circuit having a phase locked loop, PLL, arranged to generate a carrier frequency; and a controller operably coupled to the frequency generation circuit and arranged to determine a frequency location of one or more signals output by the frequency generation circuit and provide a control signal thereto to adjust the carrier frequency generated by the frequency generation circuit. The controller is arranged to: cooperate with the PLL to introduce a frequency offset in the generated carrier frequency in a first frequency direction; and introduce a compensating frequency offset in a baseband transmit signal in a second frequency direction opposite to the first frequency direction.