Display degradation compensation
    1.
    发明授权

    公开(公告)号:US11620928B2

    公开(公告)日:2023-04-04

    申请号:US17532692

    申请日:2021-11-22

    Abstract: In one embodiment, a computing system may access an image to be displayed on a display. The system may perform compensation operations on the display to compensate for degradation effects of the display. The system may determine a change in an electric signal level associated with one or more light-emitting elements of the display. The change may be caused by the compensation operations. The system may determine a wavelength shift of the light-emitting elements of the display. The wavelength shift may be caused by the change of the electric signal level. The system may adjust values of RGB color components of the pixel values of the image based on the wavelength shift of the light-emitting elements of the display. The system may output the pixel values with the adjusted values of the RGB color components to the display.

    Pulse width modulation for driving pixel using comparator

    公开(公告)号:US11430371B2

    公开(公告)日:2022-08-30

    申请号:US17410936

    申请日:2021-08-24

    Inventor: Michael Yee

    Abstract: A display device provides pulse width modulation (PWM) control of pixels using comparator circuits within each pixel. The display device includes a display panel and a row driver connected to the display panel. The row driver includes a counter configured to generate count bit values for subframes of a pulse width modulation (PWM) frame. The display panel includes pixels, each pixel including a comparator circuit and a light emitting diode. The comparator circuit includes a dynamic comparison node. The comparator circuit is configured to generate comparison results at the dynamic comparison node by comparing the count bit values of the subframes and data bit values of a control word defining a brightness level of the pixel for the PWM frame. The LED is configured to turn on or off responsive to the comparison results at the dynamic comparison node.

    Macro-pixel display backplane
    3.
    发明授权

    公开(公告)号:US12230190B2

    公开(公告)日:2025-02-18

    申请号:US18052168

    申请日:2022-11-02

    Abstract: A micro-light emitting diode (micro-LED) display backplane includes a plurality of macro-pixels. Each macro-pixel includes: a contiguous two-dimensional (2-D) array of bitcells storing display data bits for driving a set of micro-LEDs of a 2-D array of micro-LEDs; and drive circuits configured to generate, based on the display data bits stored in the contiguous 2-D array of bitcells, pulse-width modulated (PWM) drive signals for driving the set of micro-LEDs of the 2-D array of micro-LEDs. In one example, the plurality of macro-pixels is grouped into a plurality of sub-arrays, where each sub-array of the plurality of sub-arrays includes a set of macro-pixels and a local periphery circuit next to the set of macro-pixels. The local periphery circuit includes, for example, a buffer, a repeater, a clock gating circuit for gating an input clock signal to the sub-array, and/or a sub-array decoder for selecting the sub-array.

    MACRO-PIXEL DISPLAY BACKPLANE
    4.
    发明申请

    公开(公告)号:US20230136987A1

    公开(公告)日:2023-05-04

    申请号:US18052168

    申请日:2022-11-02

    Abstract: A micro-light emitting diode (micro-LED) display backplane includes a plurality of macro-pixels. Each macro-pixel includes: a contiguous two-dimensional (2-D) array of bitcells storing display data bits for driving a set of micro-LEDs of a 2-D array of micro-LEDs; and drive circuits configured to generate, based on the display data bits stored in the contiguous 2-D array of bitcells, pulse-width modulated (PWM) drive signals for driving the set of micro-LEDs of the 2-D array of micro-LEDs. In one example, the plurality of macro-pixels is grouped into a plurality of sub-arrays, where each sub-array of the plurality of sub-arrays includes a set of macro-pixels and a local periphery circuit next to the set of macro-pixels. The local periphery circuit includes, for example, a buffer, a repeater, a clock gating circuit for gating an input clock signal to the sub-array, and/or a sub-array decoder for selecting the sub-array.

    Artificial reality systems including digital and analog control of pixel intensity

    公开(公告)号:US11567325B2

    公开(公告)日:2023-01-31

    申请号:US17067070

    申请日:2020-10-09

    Abstract: Electronic display devices include digital and analog control of pixel intensity. A digital pixel control circuit and an analog pixel control circuit are provided within each pixel. The digital pixel control circuit employs digital PWM techniques to control a number of subframes within each frame during which a driving current is supplied to a light emitting element within the pixel. The analog pixel control circuit controls the level of the driving current supplied to the light emitting element within the pixel during the frame. In one example, the digital pixel control circuit and the analog pixel control circuit may together control pixel intensity with the analog pixel control circuit providing additional in-pixel bits for increased color depth. Alternatively, the digital pixel control circuit may control pixel intensity and the analog pixel control circuit may control non-uniformity compensation.

    Multi-projector display architecture

    公开(公告)号:US11743435B2

    公开(公告)日:2023-08-29

    申请号:US17349769

    申请日:2021-06-16

    Abstract: In an embodiment, a headset display device includes a central processor and multiple projector integrated circuits for eyes of a wearer of the headset display device. Each eye of the wear is associated with at least three projector integrated circuits. Each of the three projector integrated circuits is communicatively coupled to the central processor. Each projector integrated circuit includes a first integrated circuit including a light emitter array having monochrome light emitters of a single color, and a second integrated circuit coupled to the first integrated circuit. The second integrated circuit includes a graphics processor configured to generate transformed image data. The graphics processor is configured to provide the transformed image data to the first integrated circuit. The first integrated circuit is configured to output the transformed image data using the light emitter array.

    ARTIFICIAL REALITY SYSTEMS INCLUDING DIGITAL AND ANALOG CONTROL OF PIXEL INTENSITY

    公开(公告)号:US20230161165A1

    公开(公告)日:2023-05-25

    申请号:US18157901

    申请日:2023-01-23

    CPC classification number: G02B27/0172 G06T7/90 G06T19/006

    Abstract: Electronic display devices include digital and analog control of pixel intensity. A digital pixel control circuit and an analog pixel control circuit are provided within each pixel. The digital pixel control circuit employs digital PWM techniques to control a number of subframes within each frame during which a driving current is supplied to a light emitting element within the pixel. The analog pixel control circuit controls the level of the driving current supplied to the light emitting element within the pixel during the frame. In one example, the digital pixel control circuit and the analog pixel control circuit may together control pixel intensity with the analog pixel control circuit providing additional in-pixel bits for increased color depth. Alternatively, the digital pixel control circuit may control pixel intensity and the analog pixel control circuit may control non-uniformity compensation.

    Display non-uniformity correction

    公开(公告)号:US11942009B2

    公开(公告)日:2024-03-26

    申请号:US17853561

    申请日:2022-06-29

    Abstract: In one embodiment, a computing system may access a first value associated with a first pixel of the first color channel from a first bitmap associated with a first color channel. The system may select a first mask comprising a plurality of first scaling factors based on the first value of the first bitmap. The system may access a second value associated with a second pixel of the second color channel from a second bitmap associated with a second color channel. The system may select a second mask comprising a plurality of second scaling factors based on the second value of the second bitmap. The system may modify each of first and second component values of the corresponding color channel using the corresponding plurality of scaling factors of the corresponding mask. The system may output the modified first and second component values to a display.

    Display peak power management for artificial reality systems

    公开(公告)号:US11881143B2

    公开(公告)日:2024-01-23

    申请号:US17499633

    申请日:2021-10-12

    Abstract: In particular embodiments, a computing system of a device may determine a display peak power budget allocated for a display component of the device. The system may determine display information including display workload and display telemetry associated with the display component. The system may determine, in accordance with a display peak power management policy applied to the display peak power budget and the display information, one or more display-controlling parameters for maintaining the display component to operate within the display peak power budget. The system may determine, based on the one or more display-controlling parameters, a plurality of grayscales for a plurality of regions on a display screen of the device. The system may adjust a rendered frame based on the plurality of grayscales and output the adjusted rendered frame on the display screen of the device.

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