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公开(公告)号：US09990990B2
公开(公告)日：2018-06-05
申请号：US14535099
申请日：2014-11-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Paolo Fantini , Daniele Ielmini , Nicola Ciocchini
CPC classification number: G11C13/003 , G11C13/0004 , G11C13/0069 , G11C2013/0073 , G11C2013/0092 , G11C2213/76
Abstract: The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a controller configured to cause a write operation to be performed on a variable resistance memory cell, which includes application of two successive access pulses having opposite polarities, and methods of using the same.
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Patent Agency Ranking
公开(公告)号：US11195579B2
公开(公告)日：2021-12-07
申请号：US16706350
申请日：2019-12-06
Applicant: Micron Technology, Inc.
Inventor： Paolo Fantini , Daniele Ielmini , Nicola Ciocchini
Abstract: The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a controller configured to cause a write operation to be performed on a variable resistance memory cell, which includes application of two successive access pulses having opposite polarities, and methods of using the same.
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公开(公告)号：US20180261284A1
公开(公告)日：2018-09-13
申请号：US15971723
申请日：2018-05-04
Applicant: Micron Technology, Inc.
Inventor： Paolo Fantini , Daniele Ielmini , Nicola Ciocchini
IPC: G11C13/00
Abstract: The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a controller configured to cause a write operation to be performed on a variable resistance memory cell, which includes application of two successive access pulses having opposite polarities, and methods of using the same.
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公开(公告)号：US09520190B2
公开(公告)日：2016-12-13
申请号：US14563731
申请日：2014-12-08
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Mattia Boniardi , Andrea Redaelli , Fabio Pellizzer , Daniele Ielmini , Agostino Pirovano
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0064 , G11C13/0097 , G11C2013/009 , G11C2013/0092
Abstract: Subject matter disclosed herein relates to techniques involving a structural relaxation (SR) phenomenon for increasing resistance of a Reset state of phase change memory.
Abstract translation: 本文公开的主题涉及涉及用于增加相变存储器的复位状态的电阻的结构松弛（SR）现象的技术。
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5.发明申请公开(公告)号：US20160133319A1
公开(公告)日：2016-05-12
申请号：US14535099
申请日：2014-11-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Paolo Fantini , Daniele Ielmini , Nicola Ciocchini
IPC: G11C13/00
CPC classification number: G11C13/003 , G11C13/0004 , G11C13/0069 , G11C2013/0073 , G11C2013/0092 , G11C2213/76
Abstract: The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a controller configured to cause a write operation to be performed on a variable resistance memory cell, which includes application of two successive access pulses having opposite polarities, and methods of using the same.
Abstract translation: 所公开的技术通常涉及其操作的存储装置和方法，更具体地涉及一种存储器件，其具有被配置为对可变电阻存储单元执行写操作的控制器，该控制器包括应用两个连续存取脉冲， 相反的极性，以及使用它们的方法。
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公开(公告)号：US10546636B2
公开(公告)日：2020-01-28
申请号：US15971723
申请日：2018-05-04
Applicant: Micron Technology, Inc.
Inventor： Paolo Fantini , Daniele Ielmini , Nicola Ciocchini
IPC: G11C13/00
Abstract: The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a controller configured to cause a write operation to be performed on a variable resistance memory cell, which includes application of two successive access pulses having opposite polarities, and methods of using the same.
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