公开(公告)号：US20250078909A1

公开(公告)日：2025-03-06

申请号：US18747986

申请日：2024-06-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： HARUTAKA MAKABE

IPC: G11C11/4096 ,  G11C11/4074 ,  G11C11/4093

Abstract: Embodiments of the disclosure provide an apparatus comprising a small swing driver and a small swing repeater on data transfer wiring of a memory device. The small swing driver includes 1st pair of 1st-type p/n-MOS transistors and 2nd pair of 2nd-type p/n-MOS transistors. The small swing repeater includes 3rd pair of 1st-type p/n-MOS transistors and 4th pair of 2nd-type p/n-MOS transistors. In the small swing driver, positive power supply voltage and 1st step-down power supply voltage are applied to gate and source of 2nd-type p-MOS transistor of 2nd pair, and 2nd step-down power supply voltage is applied to 2nd-type p-MOS transistor of 2nd pair as backbias voltage. In the small swing repeater, 1st and 2nd step-down power supply voltages are applied to source and gate of 2nd-type p-MOS transistor of 4th pair. 2nd step-down power supply voltage is also applied to 2nd-type p-MOS transistor of 4th pair as backbias voltage.

公开(公告)号：US20240331794A1

公开(公告)日：2024-10-03

申请号：US18612284

申请日：2024-03-21

Applicant: MICRON TECHNOLOGY, INC.

Inventor： TAKAMASA SUZUKI ,  YASUSHI MATSUBARA ,  HARUTAKA MAKABE

IPC: G11C29/44 ,  G11C29/18 ,  G11C29/24

CPC classification number: G11C29/44 ,  G11C29/18 ,  G11C29/24 ,  G11C2029/1806

Abstract: Self-test circuits of memory devices disclosed herein may include circuitry that adjusts the correspondence between logical and physical addresses to match pre-repair mapping of memory locations. That is, if a memory device has been repaired by remapping logical addresses to new physical addresses, the circuitry of the test circuit restores the pre-repair mapping of the memory device in some examples. In some examples, an unused global column redundancy data path may be repurposed to provide repair information to the self-test circuit to implement the pre-repair mapping.