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    Game system with graphics processor
    1.
    发明授权
    Game system with graphics processor 有权
    具有图形处理器的游戏系统

    公开(公告)号：US06807620B1

    公开(公告)日：2004-10-19

    申请号：US09502671

    申请日：2000-02-11

    申请人： Masakazu Suzuoki ,  Akio Ohba ,  Masaaki Oka ,  Toshiyuki Hiroi ,  Teiji Yutaka ,  Toyoshi Okada ,  Masayoshi Tanaka

    发明人： Masakazu Suzuoki ,  Akio Ohba ,  Masaaki Oka ,  Toshiyuki Hiroi ,  Teiji Yutaka ,  Toyoshi Okada ,  Masayoshi Tanaka

    IPC分类号： G06F900

    CPC分类号： G06T15/005 ,  A63F2300/203

    摘要： The present invention relates to the architecture and use of a computer system optimized for the efficient modeling of graphics. The computer system has a primary processor and a graphics processor. The primary processor has two vector processor units within it, one which is closely connected to central processor unit. Simultaneously performing complex modeling calculations on the first vector processor and CPU, and geometry transformation calculations on the second vector processor, allows for efficient modeling of graphics. Furthermore, the graphics processor is optimized to rapidly switch between data flow from the two vector processors. In addition, the graphics processor is able to render many pixels simultaneously, and has a local memory on the graphics processor chip that acts as a frame buffer, texture buffer, and z buffer. This allows a high fill rate to the frame buffer.

    摘要翻译： 本发明涉及针对图形的有效建模而优化的计算机系统的架构和用途。 计算机系统具有主处理器和图形处理器。 主处理器内有两个矢量处理器单元，一个与中央处理器单元紧密连接。 同时对第一个矢量处理器和CPU执行复杂建模计算，并在第二个矢量处理器上进行几何变换计算，可以对图形进行有效的建模。 此外，图形处理器被优化以在来自两个向量处理器的数据流之间快速切换。 此外，图形处理器能够同时渲染许多像素，并且在图形处理器芯片上具有作为帧缓冲器，纹理缓冲器和z缓冲器的本地存储器。 这允许帧缓冲器的高填充率。

    Multiprocessor computer system
    2.
    发明申请
    Multiprocessor computer system 审中-公开
    多处理器计算机系统

    公开(公告)号：US20050184994A1

    公开(公告)日：2005-08-25

    申请号：US11089177

    申请日：2005-03-24

    申请人： Masakazu Suzuoki ,  Akio Ohba ,  Masaaki Oka ,  Toshiyuki Hiroi ,  Teiji Yutaka ,  Toyoshi Okada ,  Masayoshi Tanaka

    发明人： Masakazu Suzuoki ,  Akio Ohba ,  Masaaki Oka ,  Toshiyuki Hiroi ,  Teiji Yutaka ,  Toyoshi Okada ,  Masayoshi Tanaka

    IPC分类号： G06T15/00 ,  G06F15/16 ,  G06T1/00

    CPC分类号： G06T15/005 ,  A63F2300/203

    摘要： The present invention relates to the architecture and use of a computer processor optimized for instruction and data processing. The computer processor includes a main processor element in operative communication with a main memory for storing data, and sub-processor elements in operative communication with the main processor element for processing the data. Each of the sub-processor elements including a dedicated local memory for storing instructions and data. The main processor desirably comprises a primary processor core, and the sub-processor elements desirably include a set of coprocessors. One of the coprocessors may be an embedded coprocessor that performs error checking in the primary processor core. Another one of the coprocessors may be a vector processing unit. A program can directly control the vector processing unit or may indirectly control it via the primary processor core.

    摘要翻译： 本发明涉及针对指令和数据处理优化的计算机处理器的架构和用途。 计算机处理器包括与用于存储数据的主存储器进行操作通信的主处理器元件，以及与主处理器元件进行操作通信的子处理器元件，用于处理数据。 每个子处理器元件包括用于存储指令和数据的专用本地存储器。 主处理器期望地包括主处理器核，并且子处理器元件期望地包括一组协处理器。 协处理器之一可以是在主处理器核中执行错误检查的嵌入式协处理器。 协处理器中的另一个可以是向量处理单元。 程序可以直接控制向量处理单元，或者可以通过主处理器内核间接控制它。

    Entertainment apparatus having compatibility and computer system
    5.
    发明授权
    Entertainment apparatus having compatibility and computer system 有权
    具有兼容性和计算机系统的娱乐设备

    公开(公告)号：US06677951B2

    公开(公告)日：2004-01-13

    申请号：US09798776

    申请日：2001-03-02

    申请人： Teiji Yutaka ,  Masakazu Suzuoki ,  Yasuyuki Yamamoto ,  Masayoshi Tanaka ,  Makoto Furuhashi ,  Toyoshi Okada ,  Toru Akazawa

    发明人： Teiji Yutaka ,  Masakazu Suzuoki ,  Yasuyuki Yamamoto ,  Masayoshi Tanaka ,  Makoto Furuhashi ,  Toyoshi Okada ,  Toru Akazawa

    IPC分类号： B06F1516

    CPC分类号： G06F9/3879 ,  G06Q20/382 ,  H04S1/007

    摘要： An entertainment apparatus is configured to enable a program for an older version of the apparatus to be executed. In a normal mode, a main processing unit (MPU) operates as a main CPU, a graphics processor (GP) operates as a graphics processor, and an input/output subprocessor (IOP) operates as a subprocessor for input and output. In a compatible mode in which a program for an older version of the apparatus is executed, the IOP capable of executing the program for the older version of the apparatus operates as a main CPU, and the MPU and GP emulate a graphics processor for the older version of the apparatus.

    摘要翻译： 娱乐装置被配置为使得能够执行用于旧版本的装置的程序。 在正常模式中，主处理单元（MPU）作为主CPU操作，图形处理器（GP）作为图形处理器操作，并且输入/输出子处理器（IOP）作为用于输入和输出的子处理器操作。 在其中执行用于旧版本的装置的程序的兼容模式中，能够执行用于旧版本的装置的程序的IOP作为主CPU进行操作，并且MPU和GP模拟用于较旧版本的图形处理器 版本的装置。

    Image generation apparatus
    9.
    发明授权
    Image generation apparatus 失效
    图像生成装置

    公开(公告)号：US06392643B1

    公开(公告)日：2002-05-21

    申请号：US08414803

    申请日：1995-03-31

    申请人： Makoto Furuhashi ,  Masayoshi Tanaka ,  Masakazu Suzuoki ,  Teiji Yutaka

    发明人： Makoto Furuhashi ,  Masayoshi Tanaka ,  Masakazu Suzuoki ,  Teiji Yutaka

    IPC分类号： G06F1500

    CPC分类号： G06T15/503

    摘要： There is provided an image generation apparatus which requires a small amount of data for a draw command and a small capacity for a mixing ratio memory and which is capable of performing full transparent and full opaque processes utilizing a semitransparent process at high speed. The image generation apparatus includes a read circuit for reading the pixel data of the image which has been previously drawn from a frame buffer, a mixing circuit for mixing the pixel data read from the frame buffer and the pixel data of the corresponding position where the next drawing operation is to be performed in a specified mixing ratio, a write circuit for writing pixel data as a result of the mixing at the mixing circuit in the corresponding pixel position in the frame buffer, a mixing ratio memory portion for storing a plurality of mixing ratios, and an index memory for selecting the mixing ratio to be supplied to the mixing circuit from the mixing ratio memory portion according to mixing ratio selection information included in the draw command.

    摘要翻译： 改进的图像生成装置使用绘制命令，包括标记由CPU执行绘制命令的顺序的标签，并且其中标签被重写以改变执行顺序。 此外，绘图装置交替地使用包含在绘图命令中的标志来识别是否要执行单面绘图处理。

    Method and apparatus for generating images utilizing a string of draw commands preceded by an offset draw command
    10.
    发明授权
    Method and apparatus for generating images utilizing a string of draw commands preceded by an offset draw command 失效
    使用一串绘制命令生成图像的方法和装置，前面是偏移绘制命令

    公开(公告)号：US5943061A

    公开(公告)日：1999-08-24

    申请号：US708883

    申请日：1996-09-05

    申请人： Masakazu Suzuoki ,  Teiji Yutaka ,  Makoto Furuhashi ,  Masayoshi Tanaka

    发明人： Masakazu Suzuoki ,  Teiji Yutaka ,  Makoto Furuhashi ,  Masayoshi Tanaka

    IPC分类号： G06T11/00 ,  G06T3/00

    CPC分类号： G06T11/00 ,  G06T1/60 ,  G06T3/00

    摘要： A method and apparatus for generating images wherein access to a main memory is minimized during a translation of an image of a 3D object or the like on a display screen to increase the speed of the translation process. A string of draw commands for drawing an image is preceded by an offset draw command which indicates offset values for the coordinates of the vertices of the image, and the image is translated on the display screen in accordance with the offset draw command. A header portion of each of the offset draw command and the draw commands that constitute the draw command string includes data indicating the address on the main memory of the next draw command to be executed. The image generation apparatus includes a frame buffer in which an image is drawn, a CPU for generating a string of draw commands to draw the image and an offset draw command indicating offset values for the coordinates of the vertices of the image, a main memory for storing the string of draw commands and offset draw command generated by the CPU, and a drawing device portion for executing the string of draw commands and offset draw command from the main memory to draw a translated image on the frame buffer.

    摘要翻译： 一种用于生成图像的方法和装置，其中在显示屏幕上的3D对象等的图像的翻译期间对主存储器的访问最小化以增加翻译处理的速度。 用于绘制图像的一串绘图命令之前是偏移绘制命令，其指示图像顶点的坐标的偏移值，并且根据偏移绘制命令在显示屏幕上转换图像。 每个偏移绘制命令的标题部分和构成绘制命令串的绘制命令包括指示要执行的下一个绘制命令的主存储器上的地址的数据。 该图像生成装置包括：绘制图像的帧缓冲器，用于生成用于绘制图像的绘制命令串的CPU;以及指示用于图像顶点的坐标的偏移值的偏移绘制命令;主存储器 存储由CPU生成的绘制命令串和偏移绘制命令，以及用于从主存储器执行绘制命令和偏移绘制命令的绘图装置部分，以在帧缓冲器上绘制翻译图像。