METHOD OF FORMING A DRAM ARRAY OF DEVICES WITH VERTICALLY INTEGRATED RECESSED ACCESS DEVICE AND DIGITLINE
    1.
    发明申请
    METHOD OF FORMING A DRAM ARRAY OF DEVICES WITH VERTICALLY INTEGRATED RECESSED ACCESS DEVICE AND DIGITLINE 审中-公开
    用垂直集成的接入设备和数字线路形成设备的DRAM阵列的方法

    公开(公告)号:US20140231894A1

    公开(公告)日:2014-08-21

    申请号:US14265928

    申请日:2014-04-30

    CPC classification number: H01L27/10891 H01L27/108 H01L27/10882 H01L27/10885

    Abstract: A method is disclosed for forming a memory device having buried access lines (e.g., wordlines) and buried data/sense lines (e.g., digitlines) disposed below vertical cell contacts. The buried wordlines may be formed trenches in a substrate extending in a first direction, and the buried digitlines may be formed from trenches in a substrate extending in a second direction perpendicular to the first direction. The buried digitlines may be coupled to a silicon sidewall by a digitline contact disposed between the digitlines and the silicon substrate.

    Abstract translation: 公开了一种用于形成具有埋设的访问线(例如字线)和布置在垂直单元触点下方的掩埋数据/感测线(例如,数字线)的存储器件的方法。 掩埋字线可以在沿第一方向延伸的衬底中形成沟槽,并且掩埋的数字线可以由垂直于第一方向的第二方向延伸的衬底中的沟槽形成。 埋置的数字线可以通过设置在数字线和硅衬底之间的数字线接触件耦合到硅侧壁。

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