TEMPERATURE COMPENSATED OSCILLATORS AND ASSOCIATED METHODS

    公开(公告)号:US20220239254A1

    公开(公告)日:2022-07-28

    申请号:US17158920

    申请日:2021-01-26

    发明人: Jung-Hwa Choi

    IPC分类号: H03B5/04 H03B5/24

    摘要: Temperature compensated oscillators and associated methods are disclosed. The oscillator may include an inverter with a variable load configured to provide different conductance values based on an operating temperature of the oscillator. The variable load includes two or more branches in parallel, where each branch has a unique conductance value different from each other. Further, the variable load is coupled to a temperature sensor that generates signals based on determining the operating temperature. The signals of the temperature sensor can activate one or more branches of the variable load. As a result, the inverter may trigger at different voltage levels such that variations in the frequency of the clock signal that the oscillator generates can be reduced across different operating temperatures.

    Output Driver with Strength Matched Power Gating

    公开(公告)号:US20230063891A1

    公开(公告)日:2023-03-02

    申请号:US17460587

    申请日:2021-08-30

    IPC分类号: H03K17/687 G06F1/28

    摘要: The systems and methods described herein consider a first channel width of transistors of driver circuitry, where the first channel width may be set to match a second channel width of a power control transistor. A control circuit, for example, may match a second channel width of a set of power control transistors to the first channel width by turning on one or more of the set of power control transistors. Matching the width of the switches of driver circuitry and the width of the set of power control transistors may reduce losses by helping to maintain impedances of the driver circuitry.

    APPARATUSES AND METHODS FOR TRANSMITTING AN OPERATION MODE WITH A CLOCK

    公开(公告)号:US20200287547A1

    公开(公告)日:2020-09-10

    申请号:US16815259

    申请日:2020-03-11

    发明人: Jung-Hwa Choi

    摘要: Apparatuses and methods for transmitting a command mode (e.g., operation mode) associated with a command between devices are disclosed. One device may be configured as a master and one or more devices may be configured as slaves. The command mode may be transmitted by the master to the slaves by setting a resting state of a clock signal transmitted between the devices and transitioning a device enable signal to an active state. The slaves may detect the resting state of the clock at the time the enable signal is transitioned to the active state in order to determine the command mode of the command. The devices may then execute the command in the mode indicated by the transmitted command mode.

    Apparatuses and methods for transmitting an operation mode with a clock

    公开(公告)号:US11101802B2

    公开(公告)日:2021-08-24

    申请号:US16815259

    申请日:2020-03-11

    发明人: Jung-Hwa Choi

    摘要: Apparatuses and methods for transmitting a command mode (e.g., operation mode) associated with a command between devices are disclosed. One device may be configured as a master and one or more devices may be configured as slaves. The command mode may be transmitted by the master to the slaves by setting a resting state of a clock signal transmitted between the devices and transitioning a device enable signal to an active state. The slaves may detect the resting state of the clock at the time the enable signal is transitioned to the active state in order to determine the command mode of the command. The devices may then execute the command in the mode indicated by the transmitted command mode.

    APPARATUS WITH A CALIBRATION MECHANISM

    公开(公告)号:US20210110855A1

    公开(公告)日:2021-04-15

    申请号:US17131156

    申请日:2020-12-22

    摘要: An apparatus includes: a master die; one or more slave dies; a ZQ resister between a first node and a second node coupled to a voltage terminal; a ZQ pad coupled to each of the first node of the ZQ resister, the master die and the one or more slave dies; and a calibration channel electrically coupling the master die and the one or more slave dies, the calibration channel configured to communicate signals between the master die and the one or more slave dies for coordinating access to the ZQ pad across the master die and the one or more slave dies.

    Output driver with strength matched power gating

    公开(公告)号:US11750188B2

    公开(公告)日:2023-09-05

    申请号:US17460587

    申请日:2021-08-30

    摘要: The systems and methods described herein consider a first channel width of transistors of driver circuitry, where the first channel width may be set to match a second channel width of a power control transistor. A control circuit, for example, may match a second channel width of a set of power control transistors to the first channel width by turning on one or more of the set of power control transistors. Matching the width of the switches of driver circuitry and the width of the set of power control transistors may reduce losses by helping to maintain impedances of the driver circuitry.

    Apparatus with a calibration mechanism

    公开(公告)号:US11264069B2

    公开(公告)日:2022-03-01

    申请号:US17131156

    申请日:2020-12-22

    摘要: An apparatus includes: a master die; one or more slave dies; a ZQ resister between a first node and a second node coupled to a voltage terminal; a ZQ pad coupled to each of the first node of the ZQ resister, the master die and the one or more slave dies; and a calibration channel electrically coupling the master die and the one or more slave dies, the calibration channel configured to communicate signals between the master die and the one or more slave dies for coordinating access to the ZQ pad across the master die and the one or more slave dies.

    Apparatus with a calibration mechanism

    公开(公告)号:US10896704B2

    公开(公告)日:2021-01-19

    申请号:US16692306

    申请日:2019-11-22

    摘要: An apparatus includes: a master die; one or more slave dies; a ZQ resister between a first node and a second node coupled to a voltage terminal; a ZQ pad coupled to each of the first node of the ZQ resister, the master die and the one or more slave dies; and a calibration channel electrically coupling the master die and the one or more slave dies, the calibration channel configured to communicate signals between the master die and the one or more slave dies for coordinating access to the ZQ pad across the master die and the one or more slave dies.