公开(公告)号：US11494370B2

公开(公告)日：2022-11-08

申请号：US16826005

申请日：2020-03-20

Applicant: NVIDIA Corporation

Inventor： Sreedhar Narayanaswamy ,  Shantanu K. Sarangi ,  Hemalkumar Chandrakant Doshi ,  Hari Unni Krishnan ,  Gunaseelan Ponnuvel ,  Brian Lawrence Smith

IPC: G06F16/23 ,  G06F11/27 ,  G06F11/273

Abstract: Latency of in-system test (IST) execution for a hardware component of an in-field (deployed) computing platform may be reduced when a value of a physical operating parameter can be changed without rebooting the computing platform. A test (e.g., patterns or vectors) is executed for varying values of the physical operating parameter (e.g., supply voltage, clock speed, temperature, noise magnitude/duration, operating current, and the like), providing the ability to detect faults in the hardware components.

公开(公告)号：US20210294791A1

公开(公告)日：2021-09-23

申请号：US16826005

申请日：2020-03-20

Applicant: NVIDIA Corporation

Inventor： Sreedhar Narayanaswamy ,  Shantanu K. Sarangi ,  Hemalkumar Chandrakant Doshi ,  Hari Unni Krishnan ,  Gunaseelan Ponnuvel ,  Brian Lawrence Smith

IPC: G06F16/23

Abstract: Latency of in-system test (IST) execution for a hardware component of an in-field (deployed) computing platform may be reduced when a value of a physical operating parameter can be changed without rebooting the computing platform. A test (e.g., patterns or vectors) is executed for varying values of the physical operating parameter (e.g., supply voltage, clock speed, temperature, noise magnitude/duration, operating current, and the like), providing the ability to detect faults in the hardware components.