TRANSISTOR HEAT DISSIPATION STRUCTURE
    2.
    发明公开

    公开(公告)号:US20240055314A1

    公开(公告)日:2024-02-15

    申请号:US17818607

    申请日:2022-08-09

    Applicant: NXP B.V.

    CPC classification number: H01L23/367 H01L29/2003 H01L29/7786

    Abstract: A transistor formed in a semiconductor substrate is provided with a cooling trench. The cooling trench is elongated and extends laterally from a first end of an elongated gate electrode disposed above a channel region of the transistor to a second end of the gate electrode in a first direction that is parallel to a top surface of the semiconductor substrate. The cooling trench is coupled to the first current terminal and extends laterally from a first end to a second end of the first elongated cooling trench along the first direction and extends vertically from the first current terminal and through the top surface into the semiconductor substrate. The cooling trench is filled throughout with a thermally-conductive material configured to dissipate heat from the channel region into the semiconductor substrate.

    SEMICONDUCTOR DEVICE WITH CONDUCTIVE ELEMENTS FORMED OVER DIELECTRIC LAYERS AND METHOD OF FABRICATION THEREFOR

    公开(公告)号:US20220208975A1

    公开(公告)日:2022-06-30

    申请号:US17139636

    申请日:2020-12-31

    Applicant: NXP B.V.

    Abstract: An embodiment of a semiconductor device includes a semiconductor substrate, a first dielectric layer disposed over the upper surface of the semiconductor substrate, and a first current-carrying electrode and a second current-carrying electrode formed over the semiconductor substrate within openings formed in the first dielectric layer. A control electrode is formed over the semiconductor substrate and disposed between the first current-carrying electrode and a second current-carrying electrode and over the first dielectric layer. A first conductive element is formed over the first dielectric layer, adjacent the control electrode and between the control electrode and the second current-carrying electrode. A second dielectric layer is disposed over the control electrode and over the first conductive element. A second conductive element is disposed over the second dielectric layer and over the first conductive element.

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