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公开(公告)号:US20180158525A1
公开(公告)日:2018-06-07
申请号:US15827626
申请日:2017-11-30
发明人: Takayuki Nozaki , Yoshishige Suzuki , Shinji Yuasa , Yoichi Shiota , Takurou Ikeura , Hiroki Noguchi , Kazutaka Ikegami
IPC分类号: G11C13/00
CPC分类号: G11C13/0069 , G11C11/1655 , G11C11/1675 , G11C11/1677 , G11C11/1693 , G11C11/1697 , G11C13/0026 , G11C13/0038 , G11C13/0061 , G11C13/0064 , G11C2013/0076 , G11C2013/0092 , G11C2213/79
摘要: According to one embodiment, a resistance change type memory includes: a variable resistance element connected between first and second bit lines; a write control circuit including first and second transistors with terminals connected to the first and second bit lines, respectively, and controlling write to the variable resistance element; a first interconnect supplied with a first voltage and connected to the first bit line via the first transistor; and a second interconnect supplied with a second voltage higher than the first voltage, and connected to the first bit line via the second transistor. The write control circuit supplies the second voltage to the first bit line with a first pulse width via the second transistor in the ON state after supplying the first voltage to the first bit line via the first transistor.