公开(公告)号：US20220172960A1

公开(公告)日：2022-06-02

申请号：US17442624

申请日：2020-03-20

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Andreas RUDOLPH ,  Teresa BAUR ,  Christoph KLEMP

IPC: H01L21/48 ,  H01L23/538 ,  H01L21/768

Abstract: A method of manufacturing a connection structure may include forming an opening in a first main surface of a first substrate, forming a galvanic seed layer over a first main surface of a carrier substrate, and connecting the first main surface of the first substrate to the first main surface of the carrier substrate, such that the galvanic seed layer is arranged between the first main surface of the first substrate and the first main surface of the carrier substrate. The method may further include galvanically forming a conductive material over the galvanic seed layer.

公开(公告)号：US20180261717A1

公开(公告)日：2018-09-13

申请号：US15756025

申请日：2016-08-26

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Andreas RUDOLPH

IPC: H01L33/06 ,  H01L33/30 ,  H01L33/02 ,  H01L33/00

Abstract: An optoelectronic semiconductor chip (10) is specified, comprising a p-type semiconductor region (4), an n-type semiconductor region (6), and an active layer arranged between the p-type semiconductor region (4) and the n-type semiconductor region (6), said active layer being designed as a multiple quantum well structure (5), wherein the multiple quantum well structure (5) comprises quantum well layers (53) and barrier layers (51), wherein the barrier layers (51) are doped, and wherein undoped intermediate layers (52, 54) are arranged between the quantum well layers (53) and the barrier layers (51). Furthermore, a method for producing the optoelectronic semiconductor chip (10) is specified.