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公开(公告)号：US20200058603A1
公开(公告)日：2020-02-20
申请号：US16535012
申请日：2019-08-07
Applicant: QUALCOMM Incorporated
Inventor： Jongshick AHN , Iulian MIREA , Chung-Ti HSU
IPC: H01L23/64
Abstract: In certain aspects, a clamp includes first and second transistors coupled in series between a power bus and a ground. The clamp also includes a resistive voltage divider configured to bias a gate of the first transistor and a gate of the second transistor based on a supply voltage on the power bus. The clamp further includes a capacitive voltage divider configured to turn on the first and second transistors in response to a voltage transient on the power bus exceeding a trigger threshold voltage.
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2.发明申请公开(公告)号：US20200052654A1
公开(公告)日：2020-02-13
申请号：US16353632
申请日：2019-03-14
Applicant: QUALCOMM Incorporated
Inventor： Michael MCGOWAN , Iulian MIREA
Abstract: A power amplifier (PA) circuit includes a circuit for generating a supply voltage at an upper voltage rail for a power amplifier (PA). The circuit includes a DC-to-DC converter for generating a voltage from which the supply voltage is generated; a linear amplifier for sourcing or sinking current to or from the upper voltage rail via a capacitor for performing fine adjustment of the supply voltage; a first switching device coupled between an output of the linear amplifier and a lower voltage rail to selectively assist the linear amplifier sink current through the capacitor to deal with actual or anticipated transient response of the supply voltage; and a second switching device coupled between the upper voltage rail and the lower voltage rail to selectively discharge the capacitor in response to actual or anticipated transient response of the supply voltage.
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公开(公告)号：US20180034416A1
公开(公告)日：2018-02-01
申请号：US15643242
申请日：2017-07-06
Applicant: QUALCOMM Incorporated
Inventor： Joseph DUNCAN , Thomas MARRA , Song SHI , Iulian MIREA
CPC classification number: H03F1/0216 , H03F1/0211 , H03F1/26 , H03F3/195 , H03F3/213 , H03F2200/102 , H03F2200/451 , H03F2200/504 , H04B2001/0408
Abstract: Certain aspects of the present disclosure provide methods and apparatus for operating an envelope tracking power supply. The method may include receiving, from a modem of a device, information indicative of a transmit waveform statistic of a signal to be wirelessly transmitted by the device. The method may further include adjusting a configuration of the envelope tracking power supply based on the transmit waveform statistic of the signal.
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公开(公告)号：US20240429882A1
公开(公告)日：2024-12-26
申请号：US18339093
申请日：2023-06-21
Applicant: QUALCOMM Incorporated
Inventor： Chengwu TAO , Iulian MIREA , Song SHI , Jongshick AHN , Carl HARDIN
Abstract: Certain aspects of the present disclosure are directed towards an amplification circuit. The amplification circuit generally includes: a first amplifier; a first power supply having an output coupled to a supply input of the first amplifier and configured to provide a first power to the supply input of the first amplifier; a second amplifier; a second power supply having an output coupled to a supply input of the second amplifier and configured to provide a second power to the supply input of the second amplifier; and a third amplifier having a supply input coupled to the first power supply and the second power supply, the first power supply and the second power supply being further configured to provide a third power to the supply input of the third amplifier.
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公开(公告)号：US20220021348A1
公开(公告)日：2022-01-20
申请号：US16929353
申请日：2020-07-15
Applicant: QUALCOMM Incorporated
Inventor： Justin PHILPOTT , Xiaocheng JING , Jingxue LU , Iulian MIREA
Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.
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Patent Agency Ranking
公开(公告)号：US20210083576A1
公开(公告)日：2021-03-18
申请号：US16573825
申请日：2019-09-17
Applicant: QUALCOMM Incorporated
Inventor： Mukesh BANSAL , Pengfei LI , Moataz Abdelsamie ABDELFATTAH , Iulian MIREA , Song SHI
Abstract: A method for unbalancing a tri-level switching regulator uses hysteretic control when switching across multiple states of the tri-level switching regulator. The method includes determining a battery voltage and an output voltage of the tri-level switching regulator. The method also includes dynamically adjusting at least one of a first hysteretic window of a first hysteretic comparator associated with a second switching state of the tri-level switching regulator and a second hysteretic window of a second hysteretic comparator associated with a first switching state of the tri-level switching regulator based on the battery voltage and the output voltage.
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7.发明申请公开(公告)号：US20210194517A1
公开(公告)日：2021-06-24
申请号：US17125252
申请日：2020-12-17
Applicant: QUALCOMM INCORPORATED
Inventor： Iulian MIREA , Gerard James WIMPENNY , Jingxue LU , Jongshick AHN
Abstract: An envelope tracking system includes an envelope signal generator, a supply modulator coupled to the envelope signal generator, the supply modulator comprising a switching regulator path configured to provide an output voltage at an output node to a power amplifier when in an average power tracking (APT) mode, the switching regulator path configured to operate together with a linear path to provide the output voltage at the output node to the power amplifier when in an envelope tracking (ET) mode, a capacitor having a first and second terminal, the first terminal coupled to ground, a switch coupled between the output node and the second terminal of the capacitor, the switch being configured to selectively disconnect the capacitor from the output node, and a circuit coupled between the output node and the second terminal of the capacitor, the circuit comprising a bi-directional current-limiting switch, the circuit configured to charge or discharge the capacitor such that a voltage across the capacitor changes from a first voltage to a second voltage.
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公开(公告)号：US20210184661A1
公开(公告)日：2021-06-17
申请号：US17119817
申请日：2020-12-11
Applicant: QUALCOMM Incorporated
Inventor： Mukesh BANSAL , Iulian MIREA , Xun LIU
Abstract: Certain aspects of the present disclosure are directed to a regulator. The regulator generally includes a source follower circuit and a low-voltage assist circuit. The low-voltage assist circuit generally includes a first transistor having a gate coupled to an output node of the source follower circuit, a voltage comparison circuit having a first input coupled to a source of the first transistor and a second input coupled to a control input node of the source follower circuit, and a second transistor having a gate coupled to an output of the voltage comparison circuit and a drain coupled to the output node of the source follower circuit.
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公开(公告)号：US20200052682A1
公开(公告)日：2020-02-13
申请号：US16251997
申请日：2019-01-18
Applicant: QUALCOMM Incorporated
Inventor： Michael MCGOWAN , Iulian MIREA
IPC: H03K5/24 , G01R19/165
Abstract: A current comparator including a first comparator configured to generate a first output signal based on a comparison of a first current to at least a second current; a second comparator configured to generate a second output signal based on a comparison of the first current to at least a third current; and a circuit configured to: direct the first current to the first comparator to perform the comparison of the first current to the at least the second current while blocking the first current from being applied to the second comparator; or direct the first current to the second comparator to perform the comparison of the first current to the at least the third current while blocking the first current from being applied to the first comparator.
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10.发明申请公开(公告)号：US20200076299A1
公开(公告)日：2020-03-05
申请号：US16246107
申请日：2019-01-11
Applicant: QUALCOMM Incorporated
Inventor： Lin XUE , Iulian MIREA , Xiaocheng JING , Jongshick AHN , Amir PARAYANDEH , Linfei GUO
Abstract: A power converter includes a voltage source for generating an input voltage, and a regulation circuit for generating a set of output voltages based on the input voltage. The regulation circuit regulates the set of output voltages in different manners based on whether the set of output voltages is greater or less than a set of corresponding reference voltages, respectively. If one or more output voltages are less than one or more of the corresponding reference voltages, the regulation circuit regulates only those one or more output voltages during a current regulation interval based on an error voltage related to one or more differences between the one or more output voltages and the corresponding one or more reference voltages, respectively. If all output voltages are greater than the corresponding reference voltages, the regulation circuit regulates only the output voltage associated with the largest load current during the current regulation interval.
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