公开(公告)号：US10732697B2

公开(公告)日：2020-08-04

申请号：US15978902

申请日：2018-05-14

Applicant: QUALCOMM Incorporated

Inventor： Raghavendra Srinivas ,  Abhijit Joshi ,  Bharat Kavala ,  Abinash Roy

IPC: G06F1/3234 ,  G06F1/3287 ,  G06F1/30 ,  G06F1/26 ,  G06F1/28 ,  G06F1/18

Abstract: Various aspects are described herein. In some aspects, the disclosure provides techniques for reducing latency in switching computing cores of a computing system between operating modes. Certain aspects provide a computing device including a plurality of computing cores, each configured to operate in any one of a plurality of operating modes. The computing device further includes a first voltage rail and a plurality of components, each associated with one of the computing cores. The computing device further includes a plurality of switches, each switch configured to selectively couple a corresponding one of the plurality of components to the first voltage rail. The computing device further includes a controller configured to determine a current operating mode of each of the plurality of computing cores and switch the plurality of switches at a first selected switching rate based on the determined current operating mode of each of the plurality of computing cores.