公开(公告)号：US11489539B1

公开(公告)日：2022-11-01

申请号：US17474017

申请日：2021-09-13

申请人： Realtek Semiconductor Corp.

发明人： Kai-Yue Lin ,  Wei-Jyun Wang ,  Shih-Hsiung Huang ,  Kai-Yin Liu

IPC分类号： H03M1/12 ,  H03M1/46

摘要： A method of operating an analog-to-digital converter includes in a first sampling stage, switching a swap signal to a first level for a first selection circuit to reset a first capacitor array according to a first voltage configuration and for a second selection circuit to reset a second capacitor array according to the first voltage configuration, and in a second sampling stage, switching the swap signal to a second level for the first selection circuit to reset the first capacitor array according to the second voltage configuration and for the second selection circuit to reset the second capacitor array according to the second voltage configuration. A control logic circuit is used to switch the swap signal between the first level and the second level in a uniform order in a plurality of sampling stages.

公开(公告)号：US11637558B2

公开(公告)日：2023-04-25

申请号：US17551104

申请日：2021-12-14

申请人： Realtek Semiconductor Corp.

发明人： Kai-Yue Lin ,  Wei-Jyun Wang ,  Shih-Hsiung Huang ,  Kai-Yin Liu

IPC分类号： H03M1/06 ,  H03M1/12 ,  H03M1/46

摘要： An analog-to-digital converter includes a switch circuit, a first capacitor array, a second capacitor array and a comparator. A method of operating the analog-to-digital converter includes switching a swap signal to a first level in a first sampling period for the switch circuit to couple the first capacitor array to a first input terminal of the comparator and a first signal source, and couple the second capacitor array to a second input terminal of the comparator and a second signal source, and switching the swap signal to a second level in a second sampling period for the switch circuit to couple the first capacitor array to the second input terminal of the comparator and the second signal source, and couple the second capacitor array to the first input terminal of the comparator and the first signal source.

公开(公告)号：US11637559B2

公开(公告)日：2023-04-25

申请号：US17518553

申请日：2021-11-03

申请人： Realtek Semiconductor Corp.

发明人： Kai-Yue Lin ,  Wei-Jyun Wang ,  Shih-Hsiung Huang ,  Kai-Yin Liu

IPC分类号： H03M1/06

摘要： A method of operating an analog-to-digital converter includes in a first conversion period, a comparator generating a first comparison result, a first selection circuit switching a voltage output to a first capacitor of a set of larger capacitor of a first capacitor array, and a second selection circuit switching a voltage output to a second capacitor of a set of larger capacitor of a second capacitor array, and in a second conversion period after the first conversion period, the comparator generating a second comparison result different from the first comparison result, the first selection circuit switching back the voltage output to a first capacitor portion of the first capacitor of the set of larger capacitor of the first capacitor array, and the second selection circuit switching back the voltage output to a first capacitor portion of the second capacitor of the set of larger capacitor of the second capacitor array.

公开(公告)号：US20220393693A1

公开(公告)日：2022-12-08

申请号：US17551104

申请日：2021-12-14

申请人： Realtek Semiconductor Corp.

发明人： Kai-Yue Lin ,  Wei-Jyun Wang ,  Shih-Hsiung Huang ,  Kai-Yin Liu

IPC分类号： H03M1/06

摘要： An analog-to-digital converter includes a switch circuit, a first capacitor array, a second capacitor array and a comparator. A method of operating the analog-to-digital converter includes switching a swap signal to a first level in a first sampling period for the switch circuit to couple the first capacitor array to a first input terminal of the comparator and a first signal source, and couple the second capacitor array to a second input terminal of the comparator and a second signal source, and switching the swap signal to a second level in a second sampling period for the switch circuit to couple the first capacitor array to the second input terminal of the comparator and the second signal source, and couple the second capacitor array to the first input terminal of the comparator and the first signal source.

公开(公告)号：US20220329253A1

公开(公告)日：2022-10-13

申请号：US17474017

申请日：2021-09-13

申请人： Realtek Semiconductor Corp.

发明人： Kai-Yue Lin ,  Wei-Jyun Wang ,  Shih-Hsiung Huang ,  Kai-Yin Liu

IPC分类号： H03M1/12 ,  H03M1/46

摘要： A method of operating an analog-to-digital converter includes in a first sampling stage, switching a swap signal to a first level for a first selection circuit to reset a first capacitor array according to a first voltage configuration and for a second selection circuit to reset a second capacitor array according to the first voltage configuration, and in a second sampling stage, switching the swap signal to a second level for the first selection circuit to reset the first capacitor array according to the second voltage configuration and for the second selection circuit to reset the second capacitor array according to the second voltage configuration. A control logic circuit is used to switch the swap signal between the first level and the second level in a uniform order in a plurality of sampling stages.

公开(公告)号：US20220393694A1

公开(公告)日：2022-12-08

申请号：US17518553

申请日：2021-11-03

申请人： Realtek Semiconductor Corp.

发明人： Kai-Yue Lin ,  Wei-Jyun Wang ,  Shih-Hsiung Huang ,  Kai-Yin Liu

IPC分类号： H03M1/06

摘要： A method of operating an analog-to-digital converter includes in a first conversion period, a comparator generating a first comparison result, a first selection circuit switching a voltage output to a first capacitor of a set of larger capacitor of a first capacitor array, and a second selection circuit switching a voltage output to a second capacitor of a set of larger capacitor of a second capacitor array, and in a second conversion period after the first conversion period, the comparator generating a second comparison result different from the first comparison result, the first selection circuit switching back the voltage output to a first capacitor portion of the first capacitor of the set of larger capacitor of the first capacitor array, and the second selection circuit switching back the voltage output to a first capacitor portion of the second capacitor of the set of larger capacitor of the second capacitor array.

公开(公告)号：US09685973B2

公开(公告)日：2017-06-20

申请号：US15285086

申请日：2016-10-04

申请人： REALTEK SEMICONDUCTOR CORP.

发明人： Kai-Yin Liu ,  Che-Wei Chang ,  Sheng-Hsiung Lin ,  Shih-Hsiun Huang

IPC分类号： H03M1/38 ,  H03M1/46 ,  H03M1/12 ,  H03M1/40 ,  H03M1/42

CPC分类号： H03M1/466 ,  H03M1/1245 ,  H03M1/38 ,  H03M1/40 ,  H03M1/42 ,  H03M1/462 ,  H03M1/468

摘要： A successive approximation register (SAR) analog-to-digital converting method includes executing a sampling operation and a comparing operation according to a conversion clock by using an SAR analog-to-digital converter (ADC) to convert an analog input signal into a digital output signal, and resetting a sampling and digital-to-analog converting circuit of the SAR ADC when a SAR procedure of the comparing operation is completed.