公开(公告)号：US20240151804A1

公开(公告)日：2024-05-09

申请号：US18482137

申请日：2023-10-06

Applicant: Renesas Electronics Corporation

Inventor： Norihito KATOU ,  Fukashi MORISHITA

IPC: G01S5/02

CPC classification number: G01S5/0205

Abstract: A circuit including a first circuit, a second circuit and a controller is provided, the first circuit and the second circuit each including a sample-and-hold circuit configured to hold a level of an input signal of a specific timing and an analog-to-digital converter circuit configured to convert the level of the input signal held in the sample-and-hold circuit into digital data and to output the digital data, the controller being configured to cause the first circuit to output the level of the input signal of a first timing and to cause the second circuit to output the level of the input signal of a second timing.

公开(公告)号：US20220408046A1

公开(公告)日：2022-12-22

申请号：US17841183

申请日：2022-06-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Norihito KATOU ,  Fukashi MORISHITA

IPC: H04N5/378 ,  H04N5/3745

Abstract: A technique capable of improving linearity at a low illuminance is provided. A solid-state sensing image device includes: a pixel array including a plurality pixels arranged in a matrix form and a plurality of pixel signal lines connected to the plurality of pixels and receiving pixel signals supplied from the plurality pixels; a column-parallel A/D converting circuit connected to the plurality of pixel signal lines; and a reference-voltage generating circuit generating ramp-wave reference voltage that linearly changes in accordance with time passage. The column-parallel A/D converting circuit includes a first A/D converter, the first A/D converter includes: a first input terminal connected to the pixel signal line; a second input terminal receiving the reference voltage; and an offset generating circuit connected to the first input terminal and generating an offset voltage for the first input terminal.