公开(公告)号：US20040051151A1

公开(公告)日：2004-03-18

申请号：US10456548

申请日：2003-06-09

Applicant: Renesas Technology Corp.

Inventor： Hai Dang ,  Shigenobu Maeda ,  Takuji Matsumoto ,  Yuuichi Hirano

IPC: H01L029/76

CPC classification number: H01L29/66772 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78621

Abstract: Provided is an MOS transistor capable of reducing gate overlap capacitance without decreasing the driving current of the MOS transistor. Specifically, a double-angle smile oxidation structure is obtainable by curving the side surface of a gate electrode (22) so as to widen upwardly, and thickening the edge portion of a gate oxide film (21) by re-oxidation. The impurity concentration of a source/drain layer under the double-angle smile oxidation structure (a region around point B) is set to the range of 4null1018 cmnull3null40%.

Abstract translation: 提供了能够减小栅极重叠电容而不降低MOS晶体管的驱动电流的MOS晶体管。 具体地说，通过使栅电极（22）的侧面弯曲以向上变宽，通过再氧化来增厚栅极氧化膜（21）的边缘部分，可获得双角度微笑氧化结构。 在双角度微笑氧化结构（点B附近的区域）处的源极/漏极层的杂质浓度被设定为4×10 18 cm -3±40％的范围。