公开(公告)号：US20230180458A1

公开(公告)日：2023-06-08

申请号：US17933363

申请日：2022-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： BEOM SEO KIM ,  Bo Ram GU ,  Ja Min KOO ,  Sung Gil KIM ,  Jong Hyeok KIM

IPC: H01L27/108 ,  G11C5/06

CPC classification number: H01L27/10814 ,  G11C5/063

Abstract: A semiconductor memory device includes a substrate including an active area defined by an element separation layer, the active area including a first portion and second portions defined on both sides of the first portion a bit line crossing the active area and extending in a first direction on the substrate, and a bit line contact disposed between the substrate and the bit line and directly connected to the first portion of the active area. The bit line contact includes an indent area recessed into the substrate and an upper area on the indent area, a width of the indent area decreases as a distance from the bit line increases, the indent area includes a slope forming a boundary with the substrate and having a straight line shape, and a starting point of the slope of the indent area is lower than an upper surface of the element separation layer.