公开(公告)号：US20240213023A1

公开(公告)日：2024-06-27

申请号：US18373455

申请日：2023-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doo Gyu LEE ,  Jeong Jin LEE ,  Min-Cheol KWAK ,  Seung Yoon LEE ,  Chan HWANG

IPC: H01L21/027 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/66

CPC classification number: H01L21/0273 ,  H01L21/31144 ,  H01L21/32139 ,  H01L22/12

Abstract: A method for fabricating a semiconductor device using an overlay measurement and a semiconductor device fabricated by the method are provided. The method includes forming a lower pattern including a lower overlay key pattern having a first pitch, on a substrate, forming an upper pattern including an upper overlay key pattern having a second pitch different from the first pitch, on the lower pattern, measuring an overlay between the lower overlay key pattern and the upper overlay key pattern, removing the upper overlay key pattern, and after removing the upper overlay key pattern, performing an etching process using the upper pattern as an etching mask.