公开(公告)号：US20230238441A1

公开(公告)日：2023-07-27

申请号：US17966375

申请日：2022-10-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junmo PARK ,  Yeonho PARK ,  WookHyun KWON ,  Kern RIM

IPC: H01L29/423 ,  H01L27/092 ,  H01L23/522 ,  H01L23/528 ,  H01L29/49

CPC classification number: H01L29/42392 ,  H01L27/092 ,  H01L23/5226 ,  H01L23/5283 ,  H01L29/4908 ,  H01L29/0673

Abstract: A semiconductor device may include a substrate including first and second active regions, which are adjacent to each other, first and second active patterns provided on the first and second active regions, respectively, and a gate electrode extended to cross the first and second active patterns. The gate electrode may include first and second electrode portions provided on the first and second active regions, respectively. The second electrode portion may include a first metal pattern, an etch barrier pattern, a second metal pattern, and a third metal pattern sequentially covering the second active pattern. The first electrode portion may include a second metal pattern covering the first active pattern. The etch barrier pattern may be in contact with the first metal pattern and the second metal pattern, and the etch barrier pattern may be thinner than the first metal pattern and thinner than the second metal pattern.

公开(公告)号：US20240162120A1

公开(公告)日：2024-05-16

申请号：US18205814

申请日：2023-06-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kern RIM ,  Doo Hyun LEE ,  Heon Jong SHIN ,  Jin Young PARK

IPC: H01L23/48 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/481 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes first through third active patterns extending in and spaced apart from each other along a first direction on a first surface of a substrate; a first gate electrode extending in a second direction on the first active pattern; a first active cut between the first and second active patterns, wherein the first active cut extends in the second direction, and the first active cut is spaced apart from the first gate electrode in the first direction; a second active cut between the second and third active patterns, wherein the second active cut extends in the second direction, and the second active cut is spaced apart from the first active cut in the first direction; and a first through via extending vertically through the second active pattern between the first and second active cuts, and into the substrate.