公开(公告)号：US09792974B2

公开(公告)日：2017-10-17

申请号：US14966039

申请日：2015-12-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taewoong Ha ,  Byungchul Ko ,  Daekyoung Kim ,  Jonghwan Kim

IPC: G11C7/00 ,  G11C11/406 ,  G11C11/4076 ,  G11C11/4093 ,  G11C7/10

CPC classification number: G11C11/40615 ,  G11C7/1045 ,  G11C11/4076 ,  G11C11/4093 ,  G11C2211/4067

Abstract: A memory system including a plurality of dynamic random access memory (DRAM) devices and a DRAM controller is provided. The plurality of DRAM devices includes one or more DRAM groups. Each of the one or more DRAM groups includes at least two DRAM devices. The DRAM controller outputs a clock enable signal, and controls a selection signal used to select a target DRAM device that operates in a normal mode in response to the clock enable signal. At least one target DRAM device is selected from the one or more DRAM groups. One or more stand-by DRAM devices other than the at least one target DRAM device operates in a self-refresh mode.