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    BONDED ASSEMBLY INCLUDING INTERCONNECT-LEVEL BONDING PADS AND METHODS OF FORMING THE SAME
    1.
    发明申请
    BONDED ASSEMBLY INCLUDING INTERCONNECT-LEVEL BONDING PADS AND METHODS OF FORMING THE SAME 有权

    公开(公告)号：US20220093555A1

    公开(公告)日：2022-03-24

    申请号：US17542963

    申请日：2021-12-06

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Lin HOU ,  Peter RABKIN ,  Yangyin CHEN ,  Masaaki HIGASHITANI ,  Rahul SHARANGPANI

    IPC: H01L23/00

    Abstract: A method of forming a bonded assembly includes providing a first semiconductor die containing and first metallic bonding structures and a first dielectric capping layer containing openings and contacting distal horizontal surfaces of the first metallic bonding structures, providing a second semiconductor die containing second metallic bonding structures, disposing the second semiconductor die in contact with the first semiconductor die, and annealing the second semiconductor die in contact with the first semiconductor die such that a metallic material of at least one of the first metallic bonding structures and the second metallic bonding structures expands to fill the openings in the first dielectric capping layer to bond at least a first subset of the first metallic bonding structures to at least a first subset of the second metallic bonding structures.

    BONDED DIE ASSEMBLY CONTAINING PARTIALLY FILLED THROUGH-SUBSTRATE VIA STRUCTURES AND METHODS FOR MAKING THE SAME
    3.
    发明申请
    BONDED DIE ASSEMBLY CONTAINING PARTIALLY FILLED THROUGH-SUBSTRATE VIA STRUCTURES AND METHODS FOR MAKING THE SAME 有权

    公开(公告)号：US20210028148A1

    公开(公告)日：2021-01-28

    申请号：US16521849

    申请日：2019-07-25

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Chen WU ,  Peter RABKIN ,  Yangyin CHEN ,  Masaaki HIGASHITANI

    IPC: H01L25/065 ,  H01L25/18 ,  H01L25/00 ,  H01L23/00 ,  H01L23/48 ,  H01L21/768

    Abstract: A bonded assembly includes a first semiconductor die including a first substrate, first semiconductor devices located on the first substrate, first dielectric material layers located on the first semiconductor devices and embedding first metal interconnect structures, and first through-substrate via structures extending through the first substrate and contacting a respective first metal interconnect structure. Each of the first through-substrate via structures laterally surrounds a respective core cavity that contains a void or a dielectric fill material portion. The bonded assembly includes a second semiconductor die attached to the first semiconductor die, and including a second substrate, second semiconductor devices located on the second substrate, second dielectric material layers located on the second semiconductor devices and embedding second metal interconnect structures, and bonding pad structures electrically connected to a respective one of the second metal interconnect structures and bonded to a respective first through-substrate via structure.

    SEMICONDUCTOR DIE CONTAINING SILICON NITRIDE STRESS COMPENSATING REGIONS AND METHOD FOR MAKING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DIE CONTAINING SILICON NITRIDE STRESS COMPENSATING REGIONS AND METHOD FOR MAKING THE SAME 有权

    公开(公告)号：US20210272912A1

    公开(公告)日：2021-09-02

    申请号：US16806087

    申请日：2020-03-02

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Chen WU ,  Peter RABKIN ,  Yangyin CHEN ,  Masaaki HIGASHITANI

    IPC: H01L23/00 ,  H01L25/065 ,  H01L21/02

    Abstract: A method of forming a semiconductor structure includes forming first semiconductor devices over a first substrate, forming a first dielectric material layer over the first semiconductor devices, forming vertical recesses in the first dielectric material layer, such that each of the vertical recesses vertically extends from a topmost surface of the first dielectric material layer toward the first substrate, forming silicon nitride material portions in each of the vertical recesses; and locally irradiating a second subset of the silicon nitride material portions with a laser beam. A first subset of the silicon nitride material portions that is not irradiated with the laser beam includes first silicon nitride material portions that apply tensile stress to respective surrounding material portions, and the second subset of the silicon nitride material portions that is irradiated with the laser beam includes second silicon nitride material portions that apply compressive stress to respective surrounding material portions.

    BONDED ASSEMBLY CONTAINING A DIELECTRIC BONDING PATTERN DEFINITION LAYER AND METHODS OF FORMING THE SAME
    7.
    发明申请
    BONDED ASSEMBLY CONTAINING A DIELECTRIC BONDING PATTERN DEFINITION LAYER AND METHODS OF FORMING THE SAME 有权

    公开(公告)号：US20210143115A1

    公开(公告)日：2021-05-13

    申请号：US16682848

    申请日：2019-11-13

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Chen WU ,  Peter RABKIN ,  Yangyin CHEN ,  Masaaki HIGASHITANI

    IPC: H01L23/00 ,  H01L25/18 ,  H01L25/00

    Abstract: A bonded assembly and a method of forming a bonded assembly includes providing a first semiconductor die including a first substrate, first semiconductor devices, and first bonding pads that are electrically connected to a respective node of the first semiconductor devices, providing a second semiconductor die including a second substrate, second semiconductor devices, and second bonding pads that are electrically connected to a respective node of the second semiconductor devices, forming a dielectric bonding pattern definition layer including bonding pattern definition openings therethrough over the second bonding pads, and bonding the second bonding pads to the first bonding pads, where the first metal pads expand through the bonding pattern definition openings and are bonded to a respective one of the second bonding pads.

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