Abstract:
A curved display panel and a curved display device are disclosed. Long sides of each sub-pixels are parallel to long sides of the curved display panel, short sides of each sub-pixels are parallel to short sides of the curved display panel. The curved display panel with such a configuration can greatly reduce the area of the black clots on both sides of the curved display panel, and reduce the color cast on the left and right regions of the curved display panel, which reduces the uneven picture problem of the curved display panel.
Abstract:
A pixel driving method of a liquid crystal display (LCD) device, the LCD device comprising a first stage pixel, a second stage pixel, a first transistor, a second transistor, a third transistor, a first scan line, a second scan line, a plurality of data lines, a main pixel electrode, a sub pixel electrode, and a share capacitance, and the pixel driving method comprising the following steps: A step of driving the first scan line during the first driving period to charge the main pixel electrode and the sub pixel electrode of the first stage pixel, a step of ceasing to drive the first scan line during the second driving period to reduce voltages of the main pixel electrode and the sub pixel electrode of the first stage pixel, a step of driving the second scan line during the third driving period to turn on the third transistor of the first stage pixel, and a step of ceasing to drive the second scan line during the fourth driving period and pulling down the voltages of the main pixel electrode and the sub pixel electrode of the first stage pixel by implementing the share capacitance, which is connected with the third transistor during the third and the fourth driving period.
Abstract:
The disclosure is related to an array substrate, a display panel and a method for detecting the array substrate. The array substrate comprises a plurality of pixels arranged in an array. Each of the pixels comprises a plurality of sub-pixels arranged in sequence. Each of the sub-pixels is arranged opposite to a capacitor at an interval. Each sub-pixel comprises a sub-pixel electrode. At least one sub-pixel electrode comprises an extension portion. At least one extension portion of the sub-pixel electrode of the sub-pixel is arranged corresponding to the space between the adjacent sub-pixel and the capacitor corresponding to the adjacent sub-pixel.
Abstract:
Disclosed are a curved display panel and a curved display device. The curved display panel employs two data driving circuits which simultaneously output data signals to a same data line, and two scan driving circuits which simultaneously output scan signals to the same scan line, so that problems such as an image signal being distorted due to a terminal signal of a data line being seriously decayed, and a non-uniform display in brightness due to the scan line 202 being undercharged are prevented.
Abstract:
An array substrate is provided, The array substrate comprises a substrate, a common electrode, an insulating layer, a pixel transparent electrode, and a sharing capacitor transparent electrode, wherein a separating area is disposed between the pixel transparent electrode and the sharing capacitor transparent electrode; the common electrode extends to the separating area, and is exposed on the surface of the separating area by at least one groove which is on the insulating layer. Thereby a defectiveness of a product due to an ITO (indium tin oxide) remaining on the surface of the array substrate can easily detected.
Abstract:
A pixel structure includes pixel electrodes, data lines, and gate lines. Each of the pixel electrodes has two opposite ends that are each provided with one of the gate lines. The data lines and the gate lines re perpendicular to each other. Each of the pixel electrodes includes at least two sub-pixel domains. The data lines are located beneath the pixel electrode at interfacing between every two adjacent ones of the sub-pixel domains. The pixel electrodes each include slits located in the interfacing of the two adjacent sub-pixel domains. The slits are in alignment with the data line and located above the data line. Also provided is a liquid crystal display. The pixel structure and a liquid crystal display including the pixel structure have a reduced overlapping area between the data line and the pixel electrode above the data line so as to reduce parasitic capacitance and improve V-crosstalk.
Abstract:
An array substrate is provided. The array substrate comprises a substrate, a common electrode, an insulating layer, a pixel transparent electrode, and a sharing capacitor transparent electrode, wherein a separating area is disposed between the pixel transparent electrode and the sharing capacitor transparent electrode; the common electrode extends to the separating area, and is exposed on the surface of the separating area by at least one groove which is on the insulating layer. Thereby a defectiveness of a product due to an ITO (indium tin oxide) remaining on the surface of the array substrate can easily detected.
Abstract:
The present invention provides a liquid crystal display panel and a driving method thereof, in which a gate driving unit makes scan signals input to respective rows of plural scan lines at an interval of a number of rows and a source driving unit makes grey-level voltages input to plural data lines extending along a column direction at an interval of a number of columns. The present invention can solve the problem of pixel chargeability inconsistence, which is caused by voltage drops on the signal lines.
Abstract:
A pixel driving method of a liquid crystal display (LCD) device, the LCD device comprising a first stage pixel, a second stage pixel, a first transistor, a second transistor, a third transistor, a first scan line, a second scan line, a plurality of data lines, a main pixel electrode, a sub pixel electrode, and a share capacitance, and the pixel driving method comprising the following steps: A step of driving the first scan line during the first driving period to charge the main pixel electrode and the sub pixel electrode of the first stage pixel, a step of ceasing to drive the first scan line during the second driving period to reduce voltages of the main pixel electrode and the sub pixel electrode of the first stage pixel, a step of driving the second scan line during the third driving period to turn on the third transistor of the first stage pixel, and a step of ceasing to drive the second scan line during the fourth driving period and pulling down the voltages of the main pixel electrode and the sub pixel electrode of the first stage pixel by implementing the share capacitance, which is connected with the third transistor during the third and the fourth driving period.