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公开(公告)号:US20190172758A1
公开(公告)日:2019-06-06
申请号:US16207396
申请日:2018-12-03
Applicant: SHOWA DENKO K.K.
Inventor: Yoshitaka NISHIHARA , Koji KAMEI
Abstract: An evaluation method of a SiC epitaxial wafer includes: a first observation step of preparing a SiC epitaxial wafer having a high-concentration epitaxial layer having an impurity concentration of 1×1018 cm−3 or more, irradiating a surface of the high-concentration epitaxial layer having an impurity concentration of 1×1018 cm−3 or more with excitation light, and observing a surface irradiated with the excitation light via a band-pass filter having a wavelength band of 430 nm or less.
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公开(公告)号:US20230122232A1
公开(公告)日:2023-04-20
申请号:US17965965
申请日:2022-10-14
Applicant: SHOWA DENKO K.K.
Inventor: Yoshitaka NISHIHARA
Abstract: A SiC ingot includes a seed crystal and a single crystal grown on the seed crystal, wherein the single crystal has therein a micropipe passing through the single crystal in a growth direction, and when photoluminescence observation is performed on a plurality of wafers cut out from the single crystal in a direction intersecting the growth direction, an S/N ratio of the micropipe in a first wafer cut out of the plurality of wafers, which is closest to the seed crystal, is higher than an S/N ratio of the micropipe in a second wafer cut out from a position further away from the seed crystal than the first wafer.
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公开(公告)号:US20200251561A1
公开(公告)日:2020-08-06
申请号:US16781294
申请日:2020-02-04
Applicant: SHOWA DENKO K.K.
Inventor: Yoshitaka NISHIHARA , Keisuke FUKADA
Abstract: A SiC epitaxial wafer includes a SiC epitaxial layer formed on a SiC single crystal substrate, in which a total density of large-pit defects caused by micropipes in the substrate and large-pit defects caused by substrate carbon inclusions, both of which are contained in the SiC epitaxial layer, is 1 defect/cm2 or less.
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公开(公告)号:US20200152528A1
公开(公告)日:2020-05-14
申请号:US16672650
申请日:2019-11-04
Applicant: SHOWA DENKO K.K.
Inventor: Yoshitaka NISHIHARA
Abstract: The invention provides a method of manufacturing a SiC epitaxial wafer in which stacking faults are less likely to occur when a current is passed in a forward direction. The method of manufacturing the SiC epitaxial wafer includes a measurement step for measuring a basal plane dislocation density, a layer structure determining process for determining the layer structure of the epitaxial layer, and an epitaxial growth step for growing the epitaxial layers. And in the layer structure determination step, in the case of (i) when the basal plane dislocation density is lower than a predetermined value, the epitaxial layer includes a conversion layer and a drift layer from the SiC substrate side; and in the case of (ii) when the density is equal to or higher than the predetermined value, the epitaxial layer includes a conversion layer, a recombination layer, and a drift layer from the SiC substrate side.
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公开(公告)号:US20200116649A1
公开(公告)日:2020-04-16
申请号:US16598486
申请日:2019-10-10
Applicant: SHOWA DENKO K.K.
Inventor: Yoshitaka NISHIHARA , Koji KAMEI
IPC: G01N21/88
Abstract: In a SiC substrate evaluation method, a bar-shaped stacking fault is observed by irradiating a surface of a SiC substrate before stacking an epitaxial layer with excitation light and extracting light having a wavelength range from equal to or greater than 405 nm and equal to or less than 445 nm among photoluminescence light beams emitted from the first surface.
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公开(公告)号:US20200284732A1
公开(公告)日:2020-09-10
申请号:US16883866
申请日:2020-05-26
Applicant: SHOWA DENKO K.K.
Inventor: Yoshitaka NISHIHARA , Koji KAMEI
IPC: G01N21/88
Abstract: A SiC epitaxial wafer, including: a SiC substrate; and an epitaxial layer stacked on a first surface of the SiC substrate, wherein an area occupied by bar-shaped stacking faults on the first surface of the SiC substrate is identified, and the area occupied by bar-shaped stacking faults on the first surface of the SiC substrate is equal to or less than ¼ of the first surface area of the SiC substrate.
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