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公开(公告)号:US12159821B2
公开(公告)日:2024-12-03
申请号:US17748920
申请日:2022-05-19
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Ting-Yang Chou , Yih-Jenn Jiang , Don-Son Jiang
IPC: H01L23/498 , H01L21/48 , H01L25/10 , H01L23/552 , H01L25/04 , H01L25/11
Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.
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公开(公告)号:US20230307339A1
公开(公告)日:2023-09-28
申请号:US17748920
申请日:2022-05-19
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Ting-Yang Chou , Yih-Jenn Jiang , Don-Son Jiang
IPC: H01L23/498 , H01L21/48 , H01L25/10
CPC classification number: H01L23/49822 , H01L23/49811 , H01L23/49838 , H01L21/4857 , H01L25/105
Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.
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公开(公告)号:US20250038088A1
公开(公告)日:2025-01-30
申请号:US18909030
申请日:2024-10-08
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Ting-Yang Chou , Yih-Jenn Jiang , Don-Son Jiang
IPC: H01L23/498 , H01L21/48 , H01L23/552 , H01L25/04 , H01L25/10 , H01L25/11
Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.
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