公开(公告)号：US09405511B2

公开(公告)日：2016-08-02

申请号：US14524774

申请日：2014-10-27

Applicant: STMICROELECTRONICS (CANADA), INC. ,  STMICROELECTRONICS S.r.l.

Inventor： John Hogeboom ,  Hock Khor ,  Matteo Alessio Traldi ,  Anton Pelteshki

IPC: H03H7/06 ,  G06F7/72 ,  H03H17/06 ,  G06F5/16 ,  H04L25/02

CPC classification number: G06F7/724 ,  G06F5/16 ,  H03H17/06 ,  H04L25/0272 ,  H04L25/0288

Abstract: A FIR transmit architecture uses multiple driver divisions to allow signals with different delays to be summed into the output signal by the driver itself. The architecture includes a first multiplexer, a plurality of delay cells, a plurality of sign blocks, a switch block, a second multiplexer, and a plurality of drivers.

Abstract translation: FIR发送架构使用多个驱动器分区，以允许具有不同延迟的信号被驱动器自身求和到输出信号中。 该架构包括第一多路复用器，多个延迟单元，多个符号块，开关块，第二多路复用器和多个驱动器。

公开(公告)号：US08866514B2

公开(公告)日：2014-10-21

申请号：US14078190

申请日：2013-11-12

Applicant: STMicroelectronics (Canada) Inc.

Inventor： Anton Pelteshki ,  Hock Khor

IPC: H03B1/00 ,  H04L25/02 ,  H03F3/45 ,  H03K3/01

CPC classification number: H03K3/01 ,  H03F3/45179 ,  H03F3/45183 ,  H03F2203/45394 ,  H03F2203/45712 ,  H04L25/0266 ,  H04L25/0276 ,  H04L25/0282

Abstract: A driver circuit includes a differential input, a differential output, a bias node, a first T-coil having a first node coupled to the negative output node and a second node coupled to a source of supply voltage, a second T-coil having a first node coupled to the positive output node and a second node coupled to the source of supply voltage, a first transistor having a current path coupled between the center tap of the first T-coil and a first intermediate node, a second transistor having a current path coupled between the center tap of the second T-coil and a second intermediate node, a third transistor having a current path coupled between the first intermediate node and ground, and a fourth transistor having a current path coupled between the second intermediate node and ground.

Abstract translation: 驱动器电路包括差分输入，差分输出，偏置节点，具有耦合到负输出节点的第一节点的第一T形线圈和耦合到电源电压源的第二节点，第二T形线圈具有 耦合到正输出节点的第一节点和耦合到电源电压源的第二节点，具有耦合在第一T形线圈的中心抽头和第一中间节点之间的电流通路的第一晶体管，具有电流 耦合在第二T形线圈的中心抽头和第二中间节点之间的路径，具有耦合在第一中间节点和地之间的电流路径的第三晶体管，以及连接在第二中间节点和地之间的电流路径的第四晶体管 。

公开(公告)号：US20140077845A1

公开(公告)日：2014-03-20

申请号：US14078190

申请日：2013-11-12

Applicant: STMicroelectronics (Canada) Inc.

Inventor： Anton Pelteshki ,  Hock Khor

IPC: H03K3/01

CPC classification number: H03K3/01 ,  H03F3/45179 ,  H03F3/45183 ,  H03F2203/45394 ,  H03F2203/45712 ,  H04L25/0266 ,  H04L25/0276 ,  H04L25/0282

Abstract: A driver circuit includes a differential input, a differential output, a bias node, a first T-coil having a first node coupled to the negative output node and a second node coupled to a source of supply voltage, a second T-coil having a first node coupled to the positive output node and a second node coupled to the source of supply voltage, a first transistor having a current path coupled between the center tap of the first T-coil and a first intermediate node, a second transistor having a current path coupled between the center tap of the second T-coil and a second intermediate node, a third transistor having a current path coupled between the first intermediate node and ground, and a fourth transistor having a current path coupled between the second intermediate node and ground.

Abstract translation: 驱动器电路包括差分输入，差分输出，偏置节点，具有耦合到负输出节点的第一节点的第一T形线圈和耦合到电源电压源的第二节点，第二T形线圈具有 耦合到正输出节点的第一节点和耦合到电源电压源的第二节点，具有耦合在第一T形线圈的中心抽头和第一中间节点之间的电流通路的第一晶体管，具有电流 耦合在第二T形线圈的中心抽头和第二中间节点之间的路径，具有耦合在第一中间节点和地之间的电流路径的第三晶体管，以及连接在第二中间节点和地之间的电流路径的第四晶体管 。