公开(公告)号：US20180062506A1

公开(公告)日：2018-03-01

申请号：US15806023

申请日：2017-11-07

Applicant: STMICROELECTRONICS INTERNATIONAL N.V

Inventor： Phalguni Bala ,  Hiten Advani

IPC: H02M3/06

CPC classification number: H02M3/06 ,  H02M2001/0022

Abstract: According to an embodiment, a circuit includes a protection voltage generator coupled to a first voltage node, a second voltage node, and a ground voltage node, the protection voltage generator configured to generate a plurality of protection voltages at a first plurality of nodes based on the first voltage node and the second voltage node, and a voltage protection ladder coupled between the first voltage node and a low voltage circuit, the voltage protection ladder coupled to the plurality of protection voltages at the first plurality of nodes, the voltage protection ladder configured to generate a first low voltage based on the first voltage node and the plurality of protection voltages.

公开(公告)号：US20160149491A1

公开(公告)日：2016-05-26

申请号：US14549458

申请日：2014-11-20

Applicant: STMicroelectronics International N.V.

Inventor： Phalguni Bala ,  Hiten Advani

IPC: H02M3/158

CPC classification number: H02M3/06 ,  H02M2001/0022

Abstract: According to an embodiment, a circuit includes a protection voltage generator coupled to a first voltage node, a second voltage node, and a ground voltage node, the protection voltage generator configured to generate a plurality of protection voltages at a first plurality of nodes based on the first voltage node and the second voltage node, and a voltage protection ladder coupled between the first voltage node and a low voltage circuit, the voltage protection ladder coupled to the plurality of protection voltages at the first plurality of nodes, the voltage protection ladder configured to generate a first low voltage based on the first voltage node and the plurality of protection voltages.

Abstract translation: 根据实施例，电路包括耦合到第一电压节点，第二电压节点和接地电压节点的保护电压发生器，所述保护电压发生器被配置为在基于第一多个节点的基础上产生多个保护电压 所述第一电压节点和所述第二电压节点以及耦合在所述第一电压节点和低电压电路之间的电压保护梯，所述电压保护梯级耦合到所述第一多个节点处的所述多个保护电压，所述电压保护梯配置 以产生基于第一电压节点和多个保护电压的第一低电压。

公开(公告)号：US10298119B2

公开(公告)日：2019-05-21

申请号：US15806023

申请日：2017-11-07

Applicant: STMICROELECTRONICS INTERNATIONAL N.V

Inventor： Phalguni Bala ,  Hiten Advani

IPC: H02M3/06 ,  H02M1/00

Abstract: According to an embodiment, a circuit includes a protection voltage generator coupled to a first voltage node, a second voltage node, and a ground voltage node, the protection voltage generator configured to generate a plurality of protection voltages at a first plurality of nodes based on the first voltage node and the second voltage node, and a voltage protection ladder coupled between the first voltage node and a low voltage circuit, the voltage protection ladder coupled to the plurality of protection voltages at the first plurality of nodes, the voltage protection ladder configured to generate a first low voltage based on the first voltage node and the plurality of protection voltages.

公开(公告)号：US09831764B2

公开(公告)日：2017-11-28

申请号：US14549458

申请日：2014-11-20

Applicant: STMicroelectronics International N.V.

Inventor： Phalguni Bala ,  Hiten Advani

IPC: H02M3/06 ,  H02M1/00

CPC classification number: H02M3/06 ,  H02M2001/0022

Abstract: According to an embodiment, a circuit includes a protection voltage generator coupled to a first voltage node, a second voltage node, and a ground voltage node, the protection voltage generator configured to generate a plurality of protection voltages at a first plurality of nodes based on the first voltage node and the second voltage node, and a voltage protection ladder coupled between the first voltage node and a low voltage circuit, the voltage protection ladder coupled to the plurality of protection voltages at the first plurality of nodes, the voltage protection ladder configured to generate a first low voltage based on the first voltage node and the plurality of protection voltages.

公开(公告)号：US09178418B2

公开(公告)日：2015-11-03

申请号：US14448531

申请日：2014-07-31

Applicant: STMicroelectronics International N.V.

Inventor： Manohar Raju K.S.V. ,  Hiten Advani

IPC: H03K17/16 ,  H03K19/003 ,  H02M3/156 ,  H04L25/02 ,  H04L25/03

CPC classification number: H02M3/156 ,  H04L25/0272 ,  H04L25/0286 ,  H04L25/03343 ,  H04L25/03878 ,  Y10T307/352 ,  Y10T307/549

Abstract: An embodiment of a pre-emphasis circuit, an embodiment of a method for pre-emphasizing complementary single-ended signals, an embodiment of a transmitter, and an embodiment of a communication system.

Abstract translation: 预加重电路的实施例，用于预加强互补单端信号的方法的实施例，发射机的实施例以及通信系统的实施例。

公开(公告)号：US09106219B2

公开(公告)日：2015-08-11

申请号：US14075272

申请日：2013-11-08

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Mayank Kumar Singh ,  Daljeet Kumar ,  Hiten Advani

IPC: H04L25/02 ,  G11C7/12 ,  H03K19/003

CPC classification number: H03K19/00346 ,  H04L25/0278 ,  H04L25/0298

Abstract: An embodiment includes an impedance calibration circuit having a calibrator configured to compare voltage levels at an external node and an internal node of the impedance calibration circuit and to generate an output based on the comparison. The calibrator further includes respective filters coupled between the external node and a first input of the comparator, and between the internal node and a second input of the comparator. The filters are configured for symmetric noise injection into the comparator from a chip ground line to which a programmable resistor at the internal node is coupled.

Abstract translation: 实施例包括具有校准器的阻抗校准电路，该校准器被配置为比较外部节点处的电压电平和阻抗校准电路的内部节点，并且基于该比较来生成输出。 校准器还包括耦合在外部节点和比较器的第一输入端之间以及内部节点和比较器的第二输入端之间的相应滤波器。 滤波器被配置为从内部节点处的可编程电阻器耦合到的芯片地线将对称噪声注入到比较器中。