公开(公告)号：US09106219B2

公开(公告)日：2015-08-11

申请号：US14075272

申请日：2013-11-08

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Mayank Kumar Singh ,  Daljeet Kumar ,  Hiten Advani

IPC: H04L25/02 ,  G11C7/12 ,  H03K19/003

CPC classification number: H03K19/00346 ,  H04L25/0278 ,  H04L25/0298

Abstract: An embodiment includes an impedance calibration circuit having a calibrator configured to compare voltage levels at an external node and an internal node of the impedance calibration circuit and to generate an output based on the comparison. The calibrator further includes respective filters coupled between the external node and a first input of the comparator, and between the internal node and a second input of the comparator. The filters are configured for symmetric noise injection into the comparator from a chip ground line to which a programmable resistor at the internal node is coupled.

Abstract translation: 实施例包括具有校准器的阻抗校准电路，该校准器被配置为比较外部节点处的电压电平和阻抗校准电路的内部节点，并且基于该比较来生成输出。 校准器还包括耦合在外部节点和比较器的第一输入端之间以及内部节点和比较器的第二输入端之间的相应滤波器。 滤波器被配置为从内部节点处的可编程电阻器耦合到的芯片地线将对称噪声注入到比较器中。