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公开(公告)号:US20230168300A1
公开(公告)日:2023-06-01
申请号:US18053688
申请日:2022-11-08
Inventor: Mauro GIACOMINI , Fabio Enrico Carlo DISEGNI , Rajesh NARWAL , Pravesh Kumar SAINI , Mayankkumar HARESHBHAI NIRANJANI
IPC: G01R31/315 , H01L21/66
CPC classification number: G01R31/315 , H01L22/12
Abstract: An assembly for detecting a structural defect in a semiconductor die is provided. The assembly includes a defect-detection sensor and a microcontroller. The defect-detection sensor includes a plurality of resistive paths of electrical-conductive material in the semiconductor die, each of which has a first end and a second end and extends proximate a perimeter of the semiconductor die. The defect-detection sensor includes a plurality of signal-generation structures, each coupled to a respective resistive path and configured to supply a test signal to the resistive path. The microcontroller is configured to control the signal-generation structures to generate the test signals, acquire the test signals in each resistive paths, test an electrical feature of the resistive paths by performing an analysis of the test signals acquired and detect the presence of the structural defect in the semiconductor die based on a result of the analysis of the test signals acquired.
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公开(公告)号:US20150042301A1
公开(公告)日:2015-02-12
申请号:US13962958
申请日:2013-08-09
Applicant: STMicroelectronics International N.V.
Inventor: Rajesh NARWAL
CPC classification number: G05F3/08 , G05F1/46 , G05F1/462 , G05F1/468 , G05F1/56 , G05F1/565 , H02M2001/0025
Abstract: An embodiment of an arrangement includes a voltage regulator configured to provide an output voltage, said voltage regulator configured to receive one of a plurality of different regulator reference voltages and a controller configured to provide a selection signal, said selection signal being used to control which of said regulator reference voltages said voltage regulator receives.
Abstract translation: 布置的实施例包括被配置为提供输出电压的电压调节器,所述电压调节器被配置为接收多个不同调节器参考电压中的一个,以及被配置为提供选择信号的控制器,所述选择信号用于控制 所述稳压器所述电压调节器的参考电压接收。
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公开(公告)号:US20240413742A1
公开(公告)日:2024-12-12
申请号:US18332183
申请日:2023-06-09
Applicant: STMicroelectronics International N.V.
Inventor: Mayankkumar HARESHBHAI NIRANJANI , Rik PAUL , Rajesh NARWAL
Abstract: An example power management unit utilizing an example circuit to disable a voltage regulator is provided. The example circuit includes a voltage selection circuit and a power-down switching device. The voltage selection circuit configured to receive a first voltage source and a second voltage source to output a selected voltage based on the higher of the two input voltages. The voltage selection circuit utilizes a first transistor electrically connected in parallel with a second transistor between the first voltage source and the second voltage source to generate the selected voltage. The second transistor gate voltage at the second transistor gate is generated based at least in part on a voltage at the first transistor drain. The selected voltage is generated based on a voltage at the second transistor drain. The power-down switching device is configured to generate a voltage for a voltage regulator based on the selected voltage.
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公开(公告)号:US20240405538A1
公开(公告)日:2024-12-05
申请号:US18326877
申请日:2023-05-31
Applicant: STMicroelectronics International N.V.
Inventor: Mayankkumar HARESHBHAI NIRANJANI , Rajesh NARWAL , Pravesh Kumar SAINI
Abstract: A supply voltage detector of an integrated circuit is able to detect the state of a supply voltage upon startup with both high-speed and low overall power consumption. The supply voltage detector includes a comparator that generates an output voltage based on the current state of the supply voltage. The comparator includes a startup current booster that generates a supplemental current for the comparator while the supply voltage is ramping up. The start of current booster stops generating the supplemental current when the supply voltage reaches the expected steady-state value or a selected fraction or portion of the expected steady-state value.
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