Startup circuit and method for oscillator circuitry
    1.
    发明申请
    Startup circuit and method for oscillator circuitry 有权
    振荡电路的启动电路和方法

    公开(公告)号:US20040263264A1

    公开(公告)日:2004-12-30

    申请号:US10603238

    申请日:2003-06-24

    CPC classification number: H03B5/36 H03B5/06

    Abstract: A method and circuit are disclosed for enabling an oscillator circuit to oscillate a predetermined period of time following completion of a power-up operation. The circuit may include a counter having a control for receiving a control signal from a system power-on-reset circuit, and a clock input. A ring oscillator has an output coupled to the clock input of the counter.

    Abstract translation: 公开了一种方法和电路,用于使振荡器电路能够在上电操作完成之后的预定时间段内振荡。 电路可以包括具有用于从系统上电复位电路接收控制信号的控制器和时钟输入的计数器。 环形振荡器具有耦合到计数器的时钟输入的输出。

    Circuit and method of fabricating a memory cell for a static random access memory
    2.
    发明申请
    Circuit and method of fabricating a memory cell for a static random access memory 有权
    制造用于静态随机存取存储器的存储单元的电路和方法

    公开(公告)号:US20020028548A1

    公开(公告)日:2002-03-07

    申请号:US09910396

    申请日:2001-07-20

    CPC classification number: H01L27/11 G11C11/412

    Abstract: A circuit and method is disclosed for a memory cell for a static random access memory. The memory cell includes a pair of cross-coupled CMOS logic inverters that are connected together to form a latch, and a pair of p-channel transmission gate transistors that are connected to the logic inverters for selectively providing access to the latch. The layout of the memory cell includes a rectangular active area in which the p-channel transistors of the memory cell are located. The rectangular active area abuts a similar active area of an adjacent memory cell along a row of memory cells so as to form a single rectangular active area for the p-channel memory cell transistors. The rectangular active area reduces the occurrence of fabrication-related phenomena that adversely effect the performance of the memory cell.

    Abstract translation: 公开了一种用于静态随机存取存储器的存储单元的电路和方法。 存储单元包括连接在一起以形成锁存器的一对交叉耦合CMOS逻辑反相器,以及连接到逻辑反相器的一对p沟道传输栅极晶体管,用于选择性地提供对锁存器的访问。 存储单元的布局包括存储单元的p沟道晶体管位于其中的矩形有源区。 矩形有源区域沿着一行存储器单元邻接相邻存储器单元的类似有效区域,以形成用于p沟道存储单元晶体管的单个矩形有源区域。 矩形有源区减少了不利地影响存储单元的性能的制造相关现象的发生。

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