公开(公告)号：US10469058B1

公开(公告)日：2019-11-05

申请号：US15990944

申请日：2018-05-29

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Guenole Lallement ,  Fady Abouzeid

IPC: H03K3/013 ,  H03K3/012 ,  H03K3/03

Abstract: A multi-stage ring oscillator generates an output clock signal having a frequency which is dependent on a digitally leakage current that is applied to each stage of the multi-stage ring oscillator. A magnitude of a leakage current sourced by each digitally controlled leakage current source is set by a control circuit in response to a selection signal. A calibration circuit processes a reference clock signal and the output clock signal generated by the multi-stage ring oscillator to make adjustment to the selection signal which drives a locking of a frequency of the output clock signal to a desired frequency.

公开(公告)号：US10739807B2

公开(公告)日：2020-08-11

申请号：US16127771

申请日：2018-09-11

Applicant: STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Guenole Lallement ,  Fady Abouzeid

IPC: G05F3/20 ,  H03K19/0948 ,  H01L29/78 ,  H01L27/092 ,  H03K19/00 ,  G06F30/30

Abstract: A digital circuit includes logic circuitry formed by logic gates. Each logic gate includes a p-channel MOSFET and an n-channel MOSFET. A body bias generator circuit applies an n-body bias voltage to the n-body bias nodes of the p-channel MOSFETs and applies a p-body bias voltage to the p-body bias nodes of the n-channel MOSFETs. The body bias generator circuit operates in: a first mode to apply a ground supply voltage to the n-body bias nodes of the logic gates as the n-body bias voltage and apply a positive supply voltage to the p-body bias nodes of the logic gates as the p-body bias voltage; and a second mode to apply the positive supply voltage to the n-body bias nodes of the logic gates as the n-body bias voltage and apply the ground supply voltage to the p-body bias nodes of the logic gates as the p-body bias voltage.