公开(公告)号：US20150248934A1

公开(公告)日：2015-09-03

申请号：US14635815

申请日：2015-03-02

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Vincent Rabary ,  Nicolas Aupetit

IPC: G11C13/00

CPC classification number: G11C13/0069 ,  G11C11/5664 ,  G11C13/0002 ,  G11C13/004 ,  G11C13/0097 ,  G11C17/165 ,  G11C17/18 ,  G11C2013/0054

Abstract: A non-volatile digital memory includes: a plurality of thin film resistors; and a control circuit adapted to: program, during a first programming phase, the thin film resistors with a plurality of bits of data by passing a current through at least one of the thin film resistors to reduce its resistance; and read, during a restoration phase, the plurality of bits of data stored by the thin film resistors by generating an electrical signal associated with each thin film resistor and comparing each electrical signal with a reference signal.

Abstract translation: 非挥发性数字存储器包括：多个薄膜电阻器; 以及控制电路，适于：在第一编程阶段期间，通过使电流通过至少一个薄膜电阻器来减小其电阻，来编制具有多个数据位的薄膜电阻器; 并且在恢复阶段期间通过产生与每个薄膜电阻器相关联的电信号并且将每个电信号与参考信号进行比较来读取由薄膜电阻器存储的多个数据位。

公开(公告)号：US09460789B2

公开(公告)日：2016-10-04

申请号：US14635815

申请日：2015-03-02

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Vincent Rabary ,  Nicolas Aupetit

IPC: G11C11/00 ,  G11C7/06 ,  G11C5/14 ,  G11C7/02 ,  G11C8/00 ,  G11C13/00 ,  G11C11/56 ,  G11C17/16 ,  G11C17/18

CPC classification number: G11C13/0069 ,  G11C11/5664 ,  G11C13/0002 ,  G11C13/004 ,  G11C13/0097 ,  G11C17/165 ,  G11C17/18 ,  G11C2013/0054

Abstract: A non-volatile digital memory includes: a plurality of thin film resistors; and a control circuit adapted to: program, during a first programming phase, the thin film resistors with a plurality of bits of data by passing a current through at least one of the thin film resistors to reduce its resistance; and read, during a restoration phase, the plurality of bits of data stored by the thin film resistors by generating an electrical signal associated with each thin film resistor and comparing each electrical signal with a reference signal.

Abstract translation: 非挥发性数字存储器包括：多个薄膜电阻器; 以及控制电路，其适于：在第一编程阶段期间，通过使电流通过至少一个所述薄膜电阻器来减小其电阻，来将具有多个数据位的所述薄膜电阻器编程; 并且在恢复阶段期间通过产生与每个薄膜电阻器相关联的电信号并且将每个电信号与参考信号进行比较来读取由薄膜电阻器存储的多个数据位。