公开(公告)号：US20020127761A1

公开(公告)日：2002-09-12

申请号：US10037484

申请日：2001-12-19

Applicant: STMicroelectronics S.r.I.

Inventor： Marta Mottura ,  Alessandra Fischetti ,  Marco Ferrera ,  Bernardino Zerbini ,  Mauro Bombonati

IPC: H01L021/00

CPC classification number: H01L21/2007 ,  H01L21/76256

Abstract: A process for manufacturing components in a multi-layer wafer, including the steps of: providing a multi-layer wafer comprising a first semiconductor material layer, a second semiconductor material layer (, and a dielectric material layer arranged between the first and the second semiconductor material layer; and removing the first semiconductor material layer initially by mechanically thinning the first semiconductor material layer, so as to form a residual conductive layer, and subsequently by chemically removing the residual conductive layer. In one application, the multi-layer wafer is bonded to a first wafer of semiconductor material, with the second semiconductor material layer facing the first wafer, after micro-electromechanical structures have been formed in the second semiconductor material layer of the multi-layer wafer.

Abstract translation: 一种用于制造多层晶片中的部件的方法，包括以下步骤：提供包括第一半导体材料层，第二半导体材料层（以及布置在第一和第二半导体之间的介电材料层）的多层晶片 最初通过机械稀化第一半导体材料层去除第一半导体材料层，从而形成残留的导电层，随后通过化学去除残留的导电层，在一个应用中，多层晶片被粘合 在多层晶片的第二半导体材料层中形成微机电结构之后，将第二半导体材料层面向第一晶片的半导体材料的第一晶片。