公开(公告)号：US20020040995A1

公开(公告)日：2002-04-11

申请号：US09960254

申请日：2001-09-20

Applicant: STMicroelectronics S.r.I.

Inventor： Nicola Zatelli ,  Massimo Atti ,  Elisabetta Palumbo ,  Cosimo Torelli

IPC: H01L029/76 ,  H01L029/94

CPC classification number: H01L29/41725 ,  H01L29/7835

Abstract: A lateral DMOS transistor having a drain region which comprises a high-concentration portion with which the drain electrode is in contact and a low-concentration portion which is delimited by the channel region. In addition to the conventional source, drain, body and gate electrodes, the transistor has an additional electrode in contact with a point of the low-concentration portion of the drain region which is close to the channel. The additional electrode permits a direct measurement of the electric field in the gate dielectric and thus provides information which can be used both for characterizing the transistor and selecting its dimensions and for activating devices for protecting the transistor and/or other components of an integrated circuit containing the transistor.

Abstract translation: 一种具有漏极区域的横向DMOS晶体管，其包括漏电极接触的高浓度部分和由沟道区域限定的低浓度部分。 除了常规的源极，漏极，体和栅电极之外，晶体管还具有与漏极区域的靠近沟道的低浓度部分的点接触的附加电极。 附加电极允许直接测量栅极电介质中的电场，并且因此提供可以用于表征晶体管并选择其尺寸的信息，并且用于激活用于保护晶体管和/或其中包含的集成电路的其它部件的器件 晶体管。

公开(公告)号：US20030231538A1

公开(公告)日：2003-12-18

申请号：US10331135

申请日：2002-12-27

Applicant: STMicroelectronics S.r.I.

Inventor： Danilo Rimondi ,  Cosimo Torelli

IPC: G11C007/00

CPC classification number: G11C7/20 ,  G11C11/419

Abstract: A memory cell comprises a first and a second inverters connected in a latch configuration. The inverters have respective first and second means for receiving a first and a second voltage supplies, respectively. The cell also comprises means, responsive to a memory cell selection signal, for selectively connecting an input of at least one of the first and second inverter to at least one respective input/output data line, carrying an input datum to be written in the memory cell in a memory cell write operation and an output datum read from the memory cell in a memory cell read operation. For-flash-clearing the memory cell, means are provided for switching at least one of the first and second voltage supply receiving means of at least one of the first and second inverters between the first voltage supply and the second voltage supply. The memory cell is particularly adapted to implement a flash-clear function in a memory device.

Abstract translation: 存储单元包括以锁存配置连接的第一和第二反相器。 逆变器具有分别用于接收第一和第二电压源的相应的第一和第二装置。 单元还包括响应于存储器单元选择信号的装置，用于将第一和第二反相器中的至少一个的输入选择性地连接到至少一个相应的输入/输出数据线，承载要写入存储器的输入数据 在存储单元读取操作中存储单元写入操作和从存储器单元读取的输出数据。 为了闪存清除存储单元，提供了用于在第一电压源和第二电压源之间切换第一和第二逆变器中的至少一个的第一和第二电压供应接收装置中的至少一个的装置。 存储器单元特别适于在存储器件中实现闪光功能。