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公开(公告)号:US11595039B2
公开(公告)日:2023-02-28
申请号:US17658016
申请日:2022-04-05
Applicant: STMicroelectronics S.r.I.
Inventor: Noemi Gallo , Edoardo Botti
IPC: H03K17/00 , H03K17/56 , H03K19/20 , H03K17/687
Abstract: A circuit includes a high-side switch and a low-side switch. A first inverter includes first and second discharge current paths activatable to sink first and second discharge currents, respectively, from the control terminal of the high-side switch. A second inverter includes first and second charge current paths activatable to source first and second charge currents to the control terminal of the low-side switch. A high-side sensing current path includes an intermediate high-side control node, and a low-side sensing current path includes an intermediate low-side control node. The second discharge current path is selectively enablable in response to a high-side detection signal at the intermediate high-side control node having a high logic value, and the second charge current path is selectively enablable in response to a low-side detection signal at the intermediate low-side control node having a low logic value.
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公开(公告)号:US20220337236A1
公开(公告)日:2022-10-20
申请号:US17658016
申请日:2022-04-05
Applicant: STMicroelectronics S.r.I.
Inventor: Noemi Gallo , Edoardo Botti
Abstract: A circuit includes a high-side switch and a low-side switch. A first inverter includes first and second discharge current paths activatable to sink first and second discharge currents, respectively, from the control terminal of the high-side switch. A second inverter includes first and second charge current paths activatable to source first and second charge currents to the control terminal of the low-side switch. A high-side sensing current path includes an intermediate high-side control node, and a low-side sensing current path includes an intermediate low-side control node. The second discharge current path is selectively enablable in response to a high-side detection signal at the intermediate high-side control node having a high logic value, and the second charge current path is selectively enablable in response to a low-side detection signal at the intermediate low-side control node having a low logic value.
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公开(公告)号:US20170230020A1
公开(公告)日:2017-08-10
申请号:US15497313
申请日:2017-04-26
Applicant: STMicroelectronics S.r.I.
Inventor: Marco Raimondi , Edoardo Botti
CPC classification number: H03F3/45932 , H03F1/0205 , H03F3/183 , H03F3/185 , H03F3/211 , H03F3/217 , H03F3/2173 , H03F2200/03 , H03F2200/129 , H03F2200/171 , H03F2200/258 , H03F2200/351 , H03F2200/78 , H03F2203/21106
Abstract: A switching amplifier includes a first half-bridge PWM modulator, a second half-bridge PWM modulator, and at least one amplifier stage configured to receive input signals. The switching amplifier also includes a PWM control stage configured to control switching of the first PWM modulator and of the second PWM modulator as a function of the input signals, by respective first PWM control signals and second PWM control signals. The amplifier stage and the PWM control stage have a fully differential structure.
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公开(公告)号:US20230268830A1
公开(公告)日:2023-08-24
申请号:US18310824
申请日:2023-05-02
Applicant: STMicroelectronics S.r.I.
Inventor: Edoardo Botti
CPC classification number: H02M3/155 , H03F3/217 , H04R3/04 , H03F2200/03
Abstract: An audio electronic system includes a DC switching converter comprising first and second Zeta converters, each comprising an input stage, an output stage, a first switching stage, and a second switching stage. The input stage of each Zeta converter comprises a respective input inductor having a first terminal electrically coupled to the respective first switching stage. The input inductors of the input stages of the first and second Zeta converters are magnetically coupled in such a way that when current enters the terminal of the input inductor of the first Zeta converter that is coupled to the first switch stage of the first Zeta converter, a voltage induced by the coupled current is positive at the terminal of the input inductor of the second Zeta converter that is coupled to the first switching stage of the second Zeta converter.
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