CONVERTER CIRCUIT, CORRESPONDING DEVICE AND METHOD

    公开(公告)号:US20220021306A1

    公开(公告)日:2022-01-20

    申请号:US17370674

    申请日:2021-07-08

    IPC分类号: H02M3/158 H02M1/00 H02M1/08

    摘要: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposed ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

    Voltage regulator circuit, corresponding device, apparatus and method

    公开(公告)号:US10303193B2

    公开(公告)日:2019-05-28

    申请号:US15928934

    申请日:2018-03-22

    摘要: A dual-input, single-output low-dropout voltage regulator circuit includes: a first supply terminal, a second supply terminal and an output terminal, and first and second transistors having current paths coupled respectively between the first and second terminal and the output terminal. First and second drive circuit blocks are coupled respectively to the first and second supply terminals and drive the control terminals of the first and second transistors to provide a regulated voltage at the output terminal from the voltage on the first supply terminal and the second supply terminal. An input circuit block is sensitive to the voltage at the output terminal and is coupled to the first and second drive circuit blocks and configured to activate the second transistor to provide regulated voltage at the output terminal from the second terminal as a result of the voltage at the output terminal becoming lower than a desired value.

    CALIBRATION METHOD, CORRESPONDING CIRCUIT AND APPARATUS

    公开(公告)号:US20220021373A1

    公开(公告)日:2022-01-20

    申请号:US17371368

    申请日:2021-07-09

    IPC分类号: H03H11/04 H01L41/113

    摘要: In accordance with an embodiment, a method of operating a piezoelectric transducer configured to transduce mechanical vibrations into transduced electrical signals at a pair of sensor electrodes includes stimulating a resonant oscillation of the piezoelectric transducer by applying at least one pulse electrical stimulation signal to the pair of sensor electrodes; detecting, at the pair of sensor electrodes, at least one electrical signal resulting from the stimulated resonant oscillation, wherein the at least one electrical signal resulting from the stimulated resonant oscillation oscillates at a resonance frequency of the piezoelectric transducer; measuring a frequency of oscillation of the at least one electrical signal resulting from the stimulated resonant oscillation to obtain a measured resonance frequency of the piezoelectric transducer; and tuning a stopband frequency of a notch filter coupled to the piezoelectric transducer to match the measured resonance frequency of the piezoelectric transducer.

    VOLTAGE REGULATOR CIRCUIT, CORRESPONDING DEVICE, APPARATUS AND METHOD

    公开(公告)号:US20180284826A1

    公开(公告)日:2018-10-04

    申请号:US15928934

    申请日:2018-03-22

    IPC分类号: G05F1/59 G05F1/595 H03F3/45

    摘要: A dual-input, single-output low-dropout voltage regulator circuit includes: a first supply terminal, a second supply terminal and an output terminal, and first and second transistors having current paths coupled respectively between the first and second terminal and the output terminal. First and second drive circuit blocks are coupled respectively to the first and second supply terminals and drive the control terminals of the first and second transistors to provide a regulated voltage at the output terminal from the voltage on the first supply terminal and the second supply terminal. An input circuit block is sensitive to the voltage at the output terminal and is coupled to the first and second drive circuit blocks and configured to activate the second transistor to provide regulated voltage at the output terminal from the second terminal as a result of the voltage at the output terminal becoming lower than a desired value.

    Programmable-gain amplifier, corresponding device and method

    公开(公告)号:US09853617B2

    公开(公告)日:2017-12-26

    申请号:US15168832

    申请日:2016-05-31

    摘要: A programmable-gain amplifier includes: two complementary cross-coupled transistor pairs mutually coupled with each transistor in one pair having a current flow path cascaded with a current flow path of a respective one of the transistors in the other pair. First and second coupling points are formed between the pairs; with first and second sampling capacitors coupled thereto. First and second input stages have input terminals to input signals for sampling by the first and second sampling capacitors. Switching means couple the first and second input stages to the sampling capacitors so the input signals are sampled as sampled signals on the sampling capacitors. The switching means energizes the complementary cross-coupled transistor pairs so the signals sampled on the sampling capacitors undergo negative resistance regeneration growing exponentially over time to thereby provide an exponential amplifier gain.

    PROGRAMMABLE-GAIN AMPLIFIER, CORRESPONDING DEVICE AND METHOD

    公开(公告)号:US20170179897A1

    公开(公告)日:2017-06-22

    申请号:US15168832

    申请日:2016-05-31

    IPC分类号: H03G1/00 H03F3/217 H03F3/45

    摘要: A programmable-gain amplifier includes: two complementary cross-coupled transistor pairs mutually coupled with each transistor in one pair having a current flow path cascaded with a current flow path of a respective one of the transistors in the other pair. First and second coupling points are formed between the pairs; with first and second sampling capacitors coupled thereto. First and second input stages have input terminals to input signals for sampling by the first and second sampling capacitors. Switching means couple the first and second input stages to the sampling capacitors so the input signals are sampled as sampled signals on the sampling capacitors. The switching means energizes the complementary cross-coupled transistor pairs so the signals sampled on the sampling capacitors undergo negative resistance regeneration growing exponentially over time to thereby provide an exponential amplifier gain.