VOLTAGE REGULATOR CIRCUIT, CORRESPONDING DEVICE, APPARATUS AND METHOD

    公开(公告)号:US20180284826A1

    公开(公告)日:2018-10-04

    申请号:US15928934

    申请日:2018-03-22

    CPC classification number: G05F1/59 G05F1/565 G05F1/575 G05F1/595 H03F3/45273

    Abstract: A dual-input, single-output low-dropout voltage regulator circuit includes: a first supply terminal, a second supply terminal and an output terminal, and first and second transistors having current paths coupled respectively between the first and second terminal and the output terminal. First and second drive circuit blocks are coupled respectively to the first and second supply terminals and drive the control terminals of the first and second transistors to provide a regulated voltage at the output terminal from the voltage on the first supply terminal and the second supply terminal. An input circuit block is sensitive to the voltage at the output terminal and is coupled to the first and second drive circuit blocks and configured to activate the second transistor to provide regulated voltage at the output terminal from the second terminal as a result of the voltage at the output terminal becoming lower than a desired value.

    Determining a position of a motor using an on-chip component
    2.
    发明授权
    Determining a position of a motor using an on-chip component 有权
    使用片上组件确定电机的位置

    公开(公告)号:US09362855B2

    公开(公告)日:2016-06-07

    申请号:US14247817

    申请日:2014-04-08

    CPC classification number: H02P6/10 G11B19/20 H02P6/085 H02P6/18

    Abstract: An embodiment of a motor controller includes first and second supply nodes, a motor-coil node, an isolator, a motor driver, and a motor position signal generator. The isolator is coupled between the first and second supply nodes, and the motor driver is coupled to the second supply node and to the motor-coil node. The motor position signal generator is coupled to the isolator and is operable to generate, in response to the isolator, a motor-position signal that is related to a position of a motor having at least one coil coupled to the motor-coil node. By generating the motor-position signal in response to the isolator, the motor controller or another circuit may determine the at-rest or low-speed position of a motor without using an external coil-current-sense circuit.

    Abstract translation: 电动机控制器的实施例包括第一和第二供电节点,电动机线圈节点,隔离器,电动机驱动器和电动机位置信号发生器。 隔离器耦合在第一和第二电源节点之间,电动机驱动器耦合到第二电源节点和电动机线圈节点。 电动机位置信号发生器耦合到隔离器并且可操作以响应于隔离器产生与具有耦合到电动机线圈节点的至少一个线圈的电动机的位置有关的电动机位置信号。 通过响应于隔离器产生电动机位置信号,电动机控制器或另一电路可以在不使用外部线圈电流检测电路的情况下确定电动机的静止或低速位置。

    Voltage regulator circuit, corresponding device, apparatus and method

    公开(公告)号:US10303193B2

    公开(公告)日:2019-05-28

    申请号:US15928934

    申请日:2018-03-22

    Abstract: A dual-input, single-output low-dropout voltage regulator circuit includes: a first supply terminal, a second supply terminal and an output terminal, and first and second transistors having current paths coupled respectively between the first and second terminal and the output terminal. First and second drive circuit blocks are coupled respectively to the first and second supply terminals and drive the control terminals of the first and second transistors to provide a regulated voltage at the output terminal from the voltage on the first supply terminal and the second supply terminal. An input circuit block is sensitive to the voltage at the output terminal and is coupled to the first and second drive circuit blocks and configured to activate the second transistor to provide regulated voltage at the output terminal from the second terminal as a result of the voltage at the output terminal becoming lower than a desired value.

    DIE IDENTIFICATION BY OPTICALLY READING SELECTIVELY BLOWABLE FUSE ELEMENTS

    公开(公告)号:US20190081004A1

    公开(公告)日:2019-03-14

    申请号:US15703497

    申请日:2017-09-13

    Abstract: Many integrated circuit die are fabricated on a wafer. Each die includes integrated functional circuitry with an array of fuse elements that are visible to optical inspection. An electrical wafer sort is performed to test the integrated functional circuitry of each die. The array of fuse elements for each die on the wafer are programmed through the electrical wafer sort process with data bits defining a die identification that specifies a location of the die on the wafer. The die is then encapsulated in a package. In the event of package failure, a decapsulation is performed to access the die. Optical inspection of the array of fuse elements is then made to extract the die identification.

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