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公开(公告)号:US20230369279A1
公开(公告)日:2023-11-16
申请号:US18144347
申请日:2023-05-08
Applicant: STMicroelectronics S.r.l.
Inventor: Thomas GOTTARDI , Nicoletta MODARELLI , Guendalina CATALANO
IPC: H01L23/00 , H01L23/495
CPC classification number: H01L24/40 , H01L23/49582 , H01L24/32 , H01L24/37 , H01L24/73 , H01L24/83 , H01L24/84 , H01L24/92 , H01L23/49513 , H01L2224/32245 , H01L2224/37013 , H01L2224/40245 , H01L2224/40499 , H01L2224/73263 , H01L2224/83192 , H01L2224/83801 , H01L2224/84801 , H01L2224/92246 , H01L2924/01029 , H01L2924/01047
Abstract: A semiconductor die is attached on a die-attachment portion of a planar substrate. A planar electrically conductive clip in mounted onto the semiconductor die. The semiconductor die is sandwiched between the die-attachment portion and the electrically conductive clip. A distal portion of the electrically conductive clip extending away from the semiconductor die is spaced from an electrically conductive lead of the planar substrate by a gap. This gap is filled by a mass of gap-filling material transferred to an upper surface of the electrically conductive lead via Laser Induced Forward Transfer (LIFT) processing. A mass of the gap-filling material is sized and dimensioned to substantially fill the gap.
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2.
公开(公告)号:US20230187296A1
公开(公告)日:2023-06-15
申请号:US18062479
申请日:2022-12-06
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Guendalina CATALANO , Nicoletta MODARELLI
IPC: H01L23/31 , H01L23/495 , H01L21/48
CPC classification number: H01L23/3142 , H01L23/3114 , H01L23/49513 , H01L21/4821
Abstract: The present disclosure is directed to a method of manufacturing semiconductor devices that includes providing a substrate such as a leadframe having a non-etched adhesion promoter, NEAP layer over the die mounting surface and attaching thereon a semiconductor die having an attachment surface including a first and a second die areas that are wettable by electrically conductive solder material. The NEAP layer is selectively removed, e.g., via laser ablation, from the first substrate area and the second substrate area of the die mounting surface of the substrate. The first substrate area and the second substrate area of the substrate having complementary shapes with respect to the first and second die areas of the semiconductor die. Electrically conductive solder material is dispensed on the first and second substrate areas of the substrate. A semiconductor die is flipped onto the substrate with the first die area and the second die area aligned with the first substrate area and the second substrate area of the substrate having the solder material dispensed thereon. The electrically conductive solder material thus provides electrical coupling of: the first die area and the first substrate area, and the second die area and the second substrate area.
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