-
公开(公告)号：US20170294234A1
公开(公告)日：2017-10-12
申请号：US15380919
申请日：2016-12-15
Applicant: STMicroelectronics S.r.l.
Inventor： Luca Milani , Fausto Carace , Roberto Giorgio Bardelli , Giovanni Lanfranchi
IPC: G11C17/16 , H01L27/112 , H01L23/525
CPC classification number: G11C17/16 , G11C17/18 , H01L23/5252 , H01L27/11206 , H01L28/00
Abstract: An antifuse cell includes an antifuse capacitor that is activatable with a breakdown voltage to provide an electrically conductive path through the capacitor. A pull-up transistor is coupled to the antifuse capacitor. A current path of the pull-up transistor is arranged in parallel with the antifuse capacitor. A shooting transistor is coupled to the pull-up transistor with the current paths of the pull-up transistor and a current path of the shooting transistor cascaded to each other.
-
2.发明申请METHOD OF SETTING A WAVEFORM SIGNAL IN AN ULTRASOUND IMAGING APPARATUS AND APPARATUS FOR SETTING AN ULTRASONIC WAVEFORM SIGNAL USING SUCH METHOD 有权在超声成像装置中设置波形信号的方法和使用这种方法设置超声波信号的装置公开(公告)号：US20140323871A1
公开(公告)日：2014-10-30
申请号：US14263311
申请日：2014-04-28
Applicant: STMicroelectronics S.r.l.
Inventor： Roberto Giorgio Bardelli , Stefano Passi
CPC classification number: A61B8/5292 , A61B8/4494 , A61B8/5207 , A61B8/54 , G01S7/5202
Abstract: A digital representation of a waveform is generated based on signals received during a recording period. The received signals include a digital clock signal providing a determined number of clock pulses during the recording period, a plurality of binary digital signals defining, for each clock pulse of the determined number of clock pulses, a waveform state associated with the clock pulse. A digital representation of the waveform is generated and storing. The waveform has a duration based on the recording period and a profile based on the defined waveform states associated with the clock pulses of the determined number of clock pulses.
Abstract translation: 基于在记录周期期间接收的信号产生波形的数字表示。 所接收的信号包括在记录周期期间提供确定数量的时钟脉冲的数字时钟信号，多个二进制数字信号为所确定数量的时钟脉冲的每个时钟脉冲定义与时钟脉冲相关联的波形状态。 产生和存储波形的数字表示。 波形具有基于记录周期的持续时间和基于与所确定数量的时钟脉冲的时钟脉冲相关联的定义的波形状态的简档。
-
公开(公告)号：US11881875B1
公开(公告)日：2024-01-23
申请号：US17895671
申请日：2022-08-25
Applicant: STMicroelectronics S.r.l.
Inventor： Stefano Passi , Roberto Giorgio Bardelli
Abstract: A memory includes a sequence of memory locations storing a corresponding sequence of state codes that specifying the shape of a waveform. The sequence of state codes is read from the memory and decoded by a long and toggle decoder circuit. The decoding operation generates a sequence of signal codes. When the state code is a long code, the sequence of signal codes includes same signal codes corresponding to a signal level of the waveform. When the state code is a toggle code, the sequence of signal codes includes a first signal code corresponding to one signal level of the waveform and a second signal code corresponding to another signal level of the waveform. A signal decode circuit then decodes the signal codes in the sequence of signal codes to generate the waveform for output which includes the signal levels corresponding to the decoded signal codes.
-
Patent Agency Ranking
公开(公告)号：US09877703B2
公开(公告)日：2018-01-30
申请号：US14263311
申请日：2014-04-28
Applicant: STMicroelectronics S.r.l.
Inventor： Roberto Giorgio Bardelli , Stefano Passi
CPC classification number: A61B8/5292 , A61B8/4494 , A61B8/5207 , A61B8/54 , G01S7/5202
Abstract: A digital representation of a waveform is generated based on signals received during a recording period. The received signals include a digital clock signal providing a determined number of clock pulses during the recording period, a plurality of binary digital signals defining, for each clock pulse of the determined number of clock pulses, a waveform state associated with the clock pulse. A digital representation of the waveform is generated and storing. The waveform has a duration based on the recording period and a profile based on the defined waveform states associated with the clock pulses of the determined number of clock pulses.
-
公开(公告)号：US12140714B2
公开(公告)日：2024-11-12
申请号：US17176284
申请日：2021-02-16
Applicant: STMicroelectronics S.r.l.
Inventor： Stefano Passi , Roberto Giorgio Bardelli , Anna Moroni
Abstract: A waveform generator includes a system control unit and signal channels controlled by the system control unit and configured to supply driving signals for driving a respective transducer of an array of transducers. Each signal channel includes a sequential access memory having rows, where each row contains an instruction word configured to generate a respective step of a waveform to be generated. A memory output of the sequential access memory is defined by an output row at a fixed location. The waveform to be generated is defined by a block of instruction words. Each signal channel also includes an internal control unit that is configured to sequentially move the content of the sequential access memory, based on the instruction word currently at the memory output, so that sequences of instruction words are provided at the output row.
-
公开(公告)号：US20180177494A1
公开(公告)日：2018-06-28
申请号：US15849040
申请日：2017-12-20
Applicant: STMicroelectronics S.r.l.
Inventor： Roberto Giorgio Bardelli , Stefano Passi
CPC classification number: A61B8/5292 , A61B8/4494 , A61B8/5207 , A61B8/54 , G01S7/5202
Abstract: A digital representation of a waveform is generated based on signals received during a recording period. The received signals include a digital clock signal providing a determined number of clock pulses during the recording period, a plurality of binary digital signals defining, for each clock pulse of the determined number of clock pulses, a waveform state associated with the clock pulse. A digital representation of the waveform is generated and storing. The waveform has a duration based on the recording period and a profile based on the defined waveform states associated with the clock pulses of the determined number of clock pulses.
-
公开(公告)号：US20240361800A1
公开(公告)日：2024-10-31
申请号：US18631738
申请日：2024-04-10
Applicant: STMicroelectronics S.r.l.
Inventor： Juri Giovannone , Roberto Giorgio Bardelli , Andrea Gambero , Alessio Corso , Donata Rosaria Maria Nicolosi
CPC classification number: G06F1/10 , G04F10/005 , G06F1/12 , H03K5/00 , H03K2005/00013
Abstract: The present invention relates to a system and a method for generating a plurality of control signals for multi-die applications. In particular, the invention relates to the generation of synchronized control signals generated by independent dies having an own local clock and provided with a common clock. In a first step, in each die, the period of the common clock signal is measured using a TDC. In further steps, in each die, a respective phase shift is evaluated and applied between the rising edge of the common clock signal and each of the rising edges of the output control signals, using delay unit.
-
公开(公告)号：US09922722B2
公开(公告)日：2018-03-20
申请号：US15380919
申请日：2016-12-15
Applicant: STMicroelectronics S.r.l.
Inventor： Luca Milani , Fausto Carace , Roberto Giorgio Bardelli , Giovanni Lanfranchi
IPC: G11C7/00 , G11C17/16 , H01L23/525 , H01L27/112
CPC classification number: G11C17/16 , G11C17/18 , H01L23/5252 , H01L27/11206 , H01L28/00
Abstract: An antifuse cell includes an antifuse capacitor that is activatable with a breakdown voltage to provide an electrically conductive path through the capacitor. A pull-up transistor is coupled to the antifuse capacitor. A current path of the pull-up transistor is arranged in parallel with the antifuse capacitor. A shooting transistor is coupled to the pull-up transistor with the current paths of the pull-up transistor and a current path of the shooting transistor cascaded to each other.
-
-
-
-
-
-
-
Search Results
8
records
(took 0.016 seconds)
