Architecture for controlling dissipated power in a system-on-chip and related system
    1.
    发明申请
    Architecture for controlling dissipated power in a system-on-chip and related system 有权
    在系统级芯片和相关系统中控制耗散功率的架构

    公开(公告)号:US20040019814A1

    公开(公告)日:2004-01-29

    申请号:US10440044

    申请日:2003-05-16

    Abstract: A system-on-chip (SoC) architecture includes a plurality of blocks, each including a power control module to selectively control the power dissipated by the bloc. For each block, a power register is provided to receive power control instructions to selectively control the respective power control module. The system also includes a power control unit for writing respective power control instructions into the power control registers of the blocks, whereby the power dissipated is controlled individually and independently for each block under the centralized control of the power control unit. For each block, a power status register is also provided to receive status information concerning power control within the respective block. The power control unit reads the status instructions from such power status registers.

    Abstract translation: 片上系统(SoC)架构包括多个块,每个块包括功率控制模块,用于选择性地控制由该块所耗散的功率。 对于每个块,提供功率寄存器以接收功率控制指令以选择性地控制相应的功率控制模块。 该系统还包括用于将各个功率控制指令写入块的功率控制寄存器的功率控制单元,由此在功率控制单元的集中控制下,对每个块单独且独立地控制功率消耗。 对于每个块,还提供功率状态寄存器以接收关于相应块内的功率控制的状态信息。 电源控制单元从这些电源状态寄存器读取状态指令。

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