公开(公告)号：US20200279532A1

公开(公告)日：2020-09-03

申请号：US16877816

申请日：2020-05-19

Applicant: Samsung Display Co., LTD.

Inventor： Jun-Hyun PARK ,  Young-Wan SEO ,  An-Su LEE ,  Bo-Yong CHUNG ,  Kang-Moon JO ,  Chong-Chul CHAI

IPC: G09G3/3258 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel includes first, second, and third transistors, first and second capacitors, and an organic light emitting diode. The first transistor has a gate electrode connected to a first node, a first electrode that receives a first power voltage, and a second electrode connected to a second node. The second transistor has a gate electrode that receives a scan signal, a first electrode connected to the first node, and a second electrode connected to a third node. The third transistor has a gate electrode that receives a common control signal, a first electrode connected to the third node, and a second electrode connected to the second node. The organic light emitting diode has a first electrode connected to the second node and a second electrode that receives a second power voltage.

公开(公告)号：US20180226028A1

公开(公告)日：2018-08-09

申请号：US15726472

申请日：2017-10-06

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun-Hyun PARK ,  Young-Wan SEO ,  An-Su LEE ,  Bo-Yong CHUNG ,  Kang-Moon JO ,  Chong-Chul CHAI

IPC: G09G3/3258 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel for a display panel includes first and second transistors, first and second capacitors, and an organic light emitting diode. The first transistor has a gate electrode connected to a first node, a first electrode connected to a first power source, and a second electrode connected to a second node. The second transistor has a gate electrode connected to a scan line, a first electrode connected to the first node, and a second electrode connected to the second node. The organic light emitting diode has a first electrode connected to the second node and a second electrode connected to a second power source. The first capacitor has a first electrode connected to a third power source and a second electrode connected to the first node. The second capacitor has a first electrode connected to a data line and a second electrode connected to the second node.

公开(公告)号：US20210256907A1

公开(公告)日：2021-08-19

申请号：US17313471

申请日：2021-05-06

Applicant: Samsung Display Co., LTD.

Inventor： Jun-Hyun PARK ,  Young-Wan SEO ,  An-Su LEE ,  Bo-Yong CHUNG ,  Kang-Moon JO ,  Chong-Chul CHAI

IPC: G09G3/3233 ,  H01L51/52 ,  G09G3/3258

Abstract: A display panel driver drives pixels based on first power having at least three voltage levels, second power having a constant voltage, and third power having two voltage levels. Each pixel includes a first transistor connected between first and second nodes and including a gate electrode to receive a scan signal, a second transistor connected between the second node and a third node in series with the first transistor and including a gate electrode to receive the third power, and a driving transistor connected between a source of the first power and the third node and including a gate electrode connected to the first electrode to control a driving current for an organic light emitting diode. A first capacitor is connected between a source of the third power and the first node, and a second capacitor is connected between the second node and one of the data lines.

公开(公告)号：US20180166010A1

公开(公告)日：2018-06-14

申请号：US15645567

申请日：2017-07-10

Applicant: Samsung Display Co., Ltd.

Inventor： Jun-Hyun PARK ,  An-Su LEE ,  Bo-Yong CHUNG ,  Chong-Chul CHAI

IPC: G09G3/3233 ,  G09G3/3266

CPC classification number: G09G3/3233 ,  G09G3/3258 ,  G09G3/3266 ,  G09G3/3275 ,  G09G2300/0426 ,  G09G2320/0209 ,  G09G2320/0233 ,  G09G2330/02

Abstract: A display apparatus includes a plurality of pixels. Each pixel includes a first capacitor connected between a first voltage line receiving a driving signal and a first node; a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal, and a second electrode connected to a second node; an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal; a second capacitor connected between an m-th data line and the second node; a second transistor comprising a control electrode connected to an n-th gate line, a first electrode connected to the first node, and a second electrode connected to the second node;and a third transistor comprising a control electrode connected to an n-th scan line, a first electrode connected to the first voltage line, and a second electrode connected to the second node.

公开(公告)号：US20150155309A1

公开(公告)日：2015-06-04

申请号：US14249199

申请日：2014-04-09

Applicant: Samsung Display Co., LTD.

Inventor： Xinxing LI ,  Do-Hyun KIM ,  Chan-Woo YANG ,  Jeong-Ju PARK ,  Jun-Hyun PARK ,  Xun ZHU

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1259 ,  H01L27/1288

Abstract: A display substrate includes a gate metal pattern including a gate line disposed on a base substrate and a gate electrode electrically connected with the gate line, an active pattern entirely overlapped with the gate metal pattern and comprising an oxide semiconductor and a data metal pattern disposed on the active pattern and including a data line, a source electrode electrically connected with the gate line and a drain electrode spaced apart from the source electrode. The active pattern has an overlapped region in which the active pattern is overlapped with the source electrode and the drain electrode and an exposed region in which the active pattern is not overlapped with the source electrode and the drain electrode. The thickness of the overlapping region and a thickness of the exposing region are same.

Abstract translation: 显示基板包括栅极金属图案，其包括设置在基底基板上的栅极线和与栅极线电连接的栅电极，与栅极金属图案完全重叠的有源图案，并且包括氧化物半导体和数据金属图案， 所述有源图案包括数据线，与所述栅极线电连接的源电极和与所述源电极间隔开的漏电极。 有源图案具有重叠区域，其中有源图案与源电极和漏电极重叠，并且有源图案不与源电极和漏电极重叠的曝光区域。 重叠区域的厚度和曝光区域的厚度相同。

公开(公告)号：US20220415992A1

公开(公告)日：2022-12-29

申请号：US17623239

申请日：2019-11-29

Applicant: Samsung Display Co., LTD.

Inventor： Jun-Hyun PARK ,  Dong-Woo KIM ,  An-Su LEE ,  Kang-Moon JO

IPC: H01L27/32

Abstract: A display device including a substrate, a first upper power line, a conductive member, a protective insulating layer, an upper connection member, and a sub-pixel structure. The upper connection member is disposed in a first pad area and a first peripheral area on a planarization layer, and electrically connects the first upper power line and the conductive member through a first contact hole, which is formed in the protective insulating layer and the planarization layer located on the conductive member, and a second contact hole, which is formed in the protective insulating layer and the planarization layer located on the first upper power line.

公开(公告)号：US20180226029A1

公开(公告)日：2018-08-09

申请号：US15696734

申请日：2017-09-06

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun-Hyun PARK ,  An-Su LEE ,  Ji-Hye LEE ,  Bo-Yong CHUNG ,  Kang-Moon JO ,  Chong-Chul CHAI

IPC: G09G3/3266 ,  G09G3/3291 ,  G09G3/3258

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G3/3258 ,  G09G3/3291 ,  G09G2300/0809 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2310/0208 ,  G09G2310/0213 ,  G09G2310/0243 ,  G09G2310/0262 ,  G09G2310/062 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2330/028

Abstract: A pixel includes first to fourth transistors and a driving transistor. The first transistor is connected between a data line and a first node and has a gate electrode to receive a scan signal. The driving transistor is connected between the first node and a second node and has a gate electrode connected to a third node. The second transistor is connected between the second and third nodes and has a gate electrode to receive the scan signal. The third transistor is connected between first power and the first node and has a gate electrode to receive an emission signal. The fourth transistor is connected between the first and second nodes and has a gate electrode to receive an initialization signal. An organic light emitting diode is connected between the second node and second power. A storage capacitor is connected between the first power and third node.

公开(公告)号：US20180226023A1

公开(公告)日：2018-08-09

申请号：US15862944

申请日：2018-01-05

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun-Hyun PARK ,  Young-Wan SEO ,  An-Su LEE ,  Bo-Yong CHUNG ,  Kang-Moon JO ,  Chong-Chul CHAI

IPC: G09G3/3233 ,  H01L51/52 ,  G09G3/3258

Abstract: A display panel driver drives pixels based on first power having at least three voltage levels, second power having a constant voltage, and third power having two voltage levels. Each pixel includes a first transistor connected between first and second nodes and including a gate electrode to receive a scan signal, a second transistor connected between the second node and a third node in series with the first transistor and including a gate electrode to receive the third power, and a driving transistor connected between a source of the first power and the third node and including a gate electrode connected to the first electrode to control a driving current for an organic light emitting diode. A first capacitor is connected between a source of the third power and the first node, and a second capacitor is connected between the second node and one of the data lines.

公开(公告)号：US20170301295A1

公开(公告)日：2017-10-19

申请号：US15349284

申请日：2016-11-11

Applicant: Samsung Display Co., Ltd

Inventor： Jun-Hyun PARK ,  Sung-Hwan KIM ,  Kyoung-Ju SHIN ,  Sang-Uk LIM ,  Yang-Hwa CHOI

IPC: G09G3/3266 ,  G09G3/3258 ,  G09G3/3291

CPC classification number: G09G3/3266 ,  G09G3/3258 ,  G09G3/3291 ,  G09G2300/0809 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2320/043

Abstract: An emission control driver includes a plurality of stages configured to output a plurality of emission control signals, respectively. Each stage includes an input circuit for receiving a previous emission control signal from one of previous stages or a vertical start signal, and configured to control a voltage of a first node and a voltage of a second node in response to a first clock signal; a stabilizing circuit for stabilizing the voltage of the first node in response to the voltage of the second node and a second clock signal; a voltage adjusting circuit connected between the second node and a third node, configured for boosting the voltage of the second node, and controlling the boosted voltage of the second node; and an output circuit configured to control an emission control signal in response to the voltage of the first node and a voltage of the third node.