Abstract:
A pixel includes: a light emitting element; a first transistor which drives the light emitting element; a second transistor electrically connected between a gate node of the first transistor and a data line; a third transistor electrically connected between a first node of the first transistor and an initialization voltage line; and a storage capacitor electrically connected between the gate node and the first node of the first transistor. Here, upon an operation in a variable frame mode, an initialization voltage is applied to the initialization voltage line, and the initialization voltage has a first voltage level. In addition, in a data writing period during which the storage capacitor is charged with an electric charge, the initialization voltage further includes a pulse voltage such that the initialization voltage has a second voltage level that is greater than the first voltage level.
Abstract:
A display apparatus includes a display panel, a gate driver, a data driver and a driving controller. The display panel includes a gate line, a data line, a sensing line and a subpixel connected to the gate line, the data line and the sensing line. The gate outputs a gate signal to the gate line. The data driver outputs a data voltage to the data line. The driving controller controls the gate driver and the data driver. The display panel includes a first color subpixel, a second color subpixel and a third color subpixel. The driving controller is configured to determine a sensing target gate line among a plurality of gate lines based on first color data corresponding to the first color subpixel, second color data corresponding to the second color subpixel and third color data corresponding to the third color subpixel.
Abstract:
A display panel is divided into multiple areas respectively driven by multiple drivers, and the multiple areas are adjacent to each other along a first direction. An object moves along the first direction between a first frame and a second frame and is displayed on the display panel. The moving speed of the object is compared with a reference speed. A main compensation frame is added between the first frame and the second frame. A first high speed compensation frame is added between the first frame and the main compensation frame when the moving speed is higher than or equal to the reference speed. A first low speed compensation frame is added between the first frame and the main compensation frame when the moving speed is lower than the reference speed, and the first low speed compensation frame is different from the first high speed compensation frame.
Abstract:
A display panel is divided into multiple areas respectively driven by multiple drivers, and the multiple areas are adjacent to each other along a first direction. An object moves along the first direction between a first frame and a second frame and is displayed on the display panel. The moving speed of the object is compared with a reference speed. A main compensation frame is added between the first frame and the second frame. A first high speed compensation frame is added between the first frame and the main compensation frame when the moving speed is higher than or equal to the reference speed. A first low speed compensation frame is added between the first frame and the main compensation frame when the moving speed is lower than the reference speed, and the first low speed compensation frame is different from the first high speed compensation frame.
Abstract:
A display device and a driving method thereof are disclosed. In one aspect, the display device includes a display panel including a plurality of pixels, a data driver transferring data voltages to a plurality of data lines, and a gate driver transferring gate signals to a plurality of gate lines. The display device also includes a signal controller controlling the data driver and the gate driver and including a signal processor. The signal processor includes a memory and a coupling index calculator calculating a coupling index which represents a coupling degree between adjacent rows. The signal processor compensates for the input image signal to generate a compensated image signal based at least in part on the coupling index.
Abstract:
A display device includes a display panel including a plurality of gate lines having a desired gate delay time, and a plurality of pixel rows, each of the plurality of pixel rows coupled to a corresponding one of the plurality of gate lines, a gate driver configured to sequentially provide a plurality of gate signals to the plurality of gate lines, a data driver configured to provide data signals to each of the plurality of pixel rows, and a controller configured to control the gate driver to sequentially output the plurality of gate signals and to control the data driver to output the data signals that are delayed by the desired gate delay time of the plurality of gate lines.
Abstract:
A display device includes a display unit which includes pixels and gate lines and data lines connected to the pixels, a data driver connected to the data lines, and a signal controller which outputs a first frequency data control signal to the data driver at a predetermined frame frequency and outputs a second frequency data control signal to the data driver in synchronization with a vertical synchronization signal received from a graphics processing unit, wherein the data driver outputs a first data voltage to the data lines in accordance with the first frequency data control signal, and stops the output of the first data voltage and outputs a second data voltage to the data lines when the second frequency data control signal is inputted while outputting the first data voltage to the data lines.
Abstract:
A display device includes a display panel, a voltage generator configured to generate a gate driving voltage, a timing controller configured to generate a clock control signal, a gate controller configured to generate gate clock signals, a gate driver configured to generate a gate signal, an over current protection circuit configured to generate a gate clock current corresponding to the gate clock signals and output a shutdown control signal, and an abnormal signal detector configured to determine whether the clock control signal is abnormal based on a difference of a set reference signal and the clock control signal, and output a delay control signal that delays an output timing of the shutdown control signal from the over current protection circuit for a set time when the clock control signal is abnormal.
Abstract:
A liquid crystal display includes a plurality of pixels arranged in a matrix, each pixel having a first sub-pixel electrode and a second sub-pixel electrode. A first thin film transistor is connected to the first sub-pixel electrode. A second thin film transistor is connected to the second sub-pixel electrode. A third thin film transistor is connected to the second sub-pixel electrode. A fourth thin film transistor is connected to a drain electrode of the third thin film transistor. A first gate line is connected to the first thin film transistor and the second thin film transistor. A data line is connected to the first thin film transistor and the second thin film transistor. A second gate line is connected to the third thin film transistor. A third gate line is connected to the fourth thin film transistor.
Abstract:
A display device may include: a display unit including: a display area having a plurality of pixels to display an image; and a non-display area surrounding the display area; and a frame covering at least a portion of the non-display area, the frame having a rounded outer corner and an inner corner, wherein the plurality of pixels includes a first pixel disposed between the inner corner and a curved line or under the curved line, and wherein the display device is configured to operate the first pixel to constantly generate a first color while the image is displayed.