公开(公告)号：US20170047028A1

公开(公告)日：2017-02-16

申请号：US15060011

申请日：2016-03-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JI-MYOUNG SEO ,  DONG-WON PARK ,  JAE-WAN PARK ,  SANG-Ml KIM ,  YONG-DOO PARK ,  KYOUNG-WON LEE ,  JOON-CHUL GOH ,  BONGHYUN YOU

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3614 ,  G09G2310/08 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2340/0435

Abstract: A display apparatus includes a mode determiner configured to compare image signals of a previous frame and a current frame and to determine an image mode of the current frame, a sync signal generator configured to generate a panel sync signal with a low frequency corresponding to the image mode using an original sync signal with a normal frequency, the low frequency being a non-divisor frequency of the normal frequency and lower than the normal frequency, a data driver configured to drive a data line of a display panel using a data sync signal based on the panel sync signal with the low frequency, and a gate driver configured to drive a gate line of the display panel using a gate sync signal based on the panel sync signal with the low frequency.

Abstract translation: 显示装置包括：模式确定器，被配置为比较前一帧和当前帧的图像信号，并确定当前帧的图像模式;同步信号发生器，被配置为产生具有与图像对应的低频的面板同步信号 模式，使用具有正常频率的原始同步信号，所述低频是正常频率的非除数频率并且低于正常频率;数据驱动器，被配置为使用基于数据同步信号驱动显示面板的数据线 在具有低频的面板同步信号上，栅极驱动器被配置为使用基于具有低频的面板同步信号的门同步信号来驱动显示面板的栅极线。

公开(公告)号：US20230230526A1

公开(公告)日：2023-07-20

申请号：US18096760

申请日：2023-01-13

Applicant: Samsung Display Co., Ltd.

Inventor： JUNDAL KIM ,  HYUNSU KIM ,  KYUNGYOUL MIN ,  DONG-WON PARK ,  CHAEHEE PARK ,  JONGMAN BAE

IPC: G09G3/20

CPC classification number: G09G3/2096 ,  G09G2340/02 ,  G09G2310/0286

Abstract: A data transceiver system includes an encoder which generates first encoded data by performing a logical operation based on a random number and image data, and generates second encoded data by inverting the first encoded data every N bits, where N is a positive integer greater than or equal to 2, and a decoder which restores the first encoded data by decoding the second encoded data, and restores the image data by decoding the first encoded data.

公开(公告)号：US20170069256A1

公开(公告)日：2017-03-09

申请号：US15092863

申请日：2016-04-07

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JI-MYOUNG SEO ,  DONG-WON PARK ,  JAE WAN PARK ,  PO-YUN PARK ,  HONG-KYU KIM ,  BONGHYUN YOU ,  JUNG-HWAN CHO

IPC: G09G3/20

CPC classification number: G09G3/2096 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3696 ,  G09G5/393 ,  G09G2310/08 ,  G09G2330/023 ,  G09G2340/0435 ,  G09G2360/02 ,  G09G2360/18

Abstract: A display apparatus includes a display panel comprising a plurality of data lines and a plurality of gate lines crossing the plurality of data lines, a frequency detector configured to receive an input synchronization signal with an input frequency which is varying in a preset frequency range and to count clock cycles of an input frame in the input synchronization signal, and a synchronization signal generator configured to generate an output synchronization signal which has an insertion frame corresponding to a frame of maximum frequency within the preset frequency range and inset the insertion frame in a vertical blanking period of the input frame, based on the clock count.

Abstract translation: 显示装置包括：显示面板，包括多条数据线和与多条数据线交叉的多条栅极线;频率检测器，被配置为接收具有在预设频率范围内变化的输入频率的输入同步信号，以及 计算输入同步信号中的输入帧的时钟周期，以及同步信号发生器，被配置为产生输出同步信号，该输出同步信号具有与预设频率范围内的最大频率的帧相对应的插入帧，并将插入帧插入垂直 输入帧的消隐周期，基于时钟计数。

公开(公告)号：US20230260479A1

公开(公告)日：2023-08-17

申请号：US18081062

申请日：2022-12-14

Applicant: Samsung Display Co., Ltd.

Inventor： JONGMAN BAE ,  JUNDAL KIM ,  HYUNSU KIM ,  DONG-WON PARK ,  JUNYONG SONG ,  TAEYOUNG JIN

IPC: G09G5/00

CPC classification number: G09G5/008 ,  G09G2310/0291 ,  G09G2330/021

Abstract: An electronic device includes a host processor including a data transmitter, a driving driver, and a display panel. The data transmitter includes a phase locked loop that generates a first clock and a second clock, a clock block that receives the first clock, a plurality of data blocks that receives the second clock, a first buffer connected between the phase locked loop and the clock block, and a plurality of second buffers respectively connected between the phase locked loop and the plurality of data blocks, and the first buffer and each of the plurality of second buffers may be activated or deactivated depending on an interface mode.

公开(公告)号：US20170025077A1

公开(公告)日：2017-01-26

申请号：US15000747

申请日：2016-01-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： NAM-GON CHOI ,  DONG-WON PARK ,  SEUNG-HWAN MOON ,  BYUNG-KIL JEON

IPC: G09G3/36

Abstract: A display panel driving apparatus includes a data processing part. The data processing part calculates a first pretilt value of previous image data to output a first pretilt signal, calculates a second pretilt value of current image data to output a second pretilt signal, analyze a luminance distribution of unit pixels from image data to output luminance distribution analysis data, analyzes a color pixel to which a pretilt is applied based on the unit pixel from the image data to output color analysis data, outputs a determination signal indicating whether the pretilt is applied to the image data, according to the luminance distribution analysis data and the color analysis data, and outputs pretilt compensation image data according to the first pretilt signal, the second pretilt signal and the determination signal, as compensation image data.

Abstract translation: 显示面板驱动装置包括数据处理部。 数据处理部分计算先前图像数据的第一预倾斜值以输出第一预倾角信号，计算当前图像数据的第二预倾斜值以输出第二预倾角信号，从图像数据分析单位像素的亮度分布以输出亮度分布 分析数据，基于来自图像数据的单位像素分析应用了预倾斜的颜色像素以输出颜色分析数据，根据亮度分布分析数据输出指示是否将预倾斜应用于图像数据的确定信号 和颜色分析数据，并根据第一预倾斜信号，第二预倾斜信号和确定信号输出预倾斜补偿图像数据作为补偿图像数据。

公开(公告)号：US20160111051A1

公开(公告)日：2016-04-21

申请号：US14697996

申请日：2015-04-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAE-GWAN JEON ,  JAE-HYOUNG PARK ,  KI-TAE YOON ,  DONG-WON PARK ,  YOUNG-SOO SOHN ,  WON-BOK LEE

IPC: G09G3/36

CPC classification number: G09G3/3674 ,  G09G2310/08 ,  G09G2320/0223

Abstract: A display apparatus includes a display panel comprising a plurality of gate lines and a plurality of data lines, a gate driver circuit configured to generate a plurality of gate signals sequentially applied to the gate lines, and a timing controller configured to generate a reference control signal, the reference control signal adjusting at least one of a pulse-width and a phase of a predetermined gate signal among the gate signals.

Abstract translation: 显示装置包括：显示面板，包括多条栅极线和多条数据线;栅极驱动电路，被配置为产生顺序施加到栅极线的多个栅极信号;以及定时控制器，被配置为产生参考控制信号 所述参考控制信号调整所述栅极信号中的预定栅极信号的脉冲宽度和相位中的至少一个。