公开(公告)号：US20150194116A1

公开(公告)日：2015-07-09

申请号：US14319233

申请日：2014-06-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Bong-Jun LEE ,  Ji-Young JEONG ,  Ju-Hyeon BAEK ,  Dong-Wuuk SEO ,  Byeong-Jae AHN

IPC: G09G3/36 ,  G02F1/1335 ,  G02F1/1362

CPC classification number: G09G3/3685 ,  G02F1/133512 ,  G02F1/133514 ,  G02F2001/133388 ,  G09G2310/0283 ,  Y10T29/49117

Abstract: A display panel includes a plurality of pixels disposed in an active area and arranged substantially in a matrix form including a pixel row and a pixel column, a first gate line disposed adjacent to a first side n of the pixel row and connected to a first pixel in the pixel row, a second gate line disposed adjacent to a second side of the pixel row and connected to a second pixel in the pixel row, a plurality of data lines crossing the first and second gate lines, where the pixels in a pair of adjacent pixel columns are connected to a same data line, and a blocking pattern which overlaps a pixel column disposed in an end portion of the active area.

Abstract translation: 显示面板包括设置在有效区域中并且基本上以矩阵形式布置的多个像素，其包括像素行和像素列，第一栅极线与像素行的第一侧n相邻并且连接到第一像素 在所述像素行中，与所述像素行的第二侧相邻并且连接到所述像素行中的第二像素的第二栅极线，与所述第一和第二栅极线交叉的多条数据线， 相邻像素列连接到相同的数据线，以及与设置在有源区的端部中的像素列重叠的阻挡图案。

公开(公告)号：US20150195924A1

公开(公告)日：2015-07-09

申请号：US14312857

申请日：2014-06-24

Applicant: Samsung Display Co., Ltd.

Inventor： Byeong-Jae AHN ,  Ju-Hyeon BAEK ,  Dong-Wuuk SEO ,  Bong-Jun LEE

IPC: H05K5/00 ,  H05K5/02

CPC classification number: H05K5/02 ,  G02F1/133308 ,  G02F2001/13332 ,  G02F2001/133328 ,  G02F2201/46

Abstract: A display panel includes a first substrate, a second substrate which faces the first substrate, is smaller than the first substrate so that an edge of the first substrate is exposed in a plan view, a fixing member disposed on the exposed edge of the first substrate, and a bonding member disposed between the first substrate and the fixing member.

Abstract translation: 显示面板包括第一基板，面对第一基板的第二基板，比第一基板小，使得第一基板的边缘在平面图中露出，固定部件设置在第一基板的露出边缘上 以及设置在第一基板和固定部件之间的接合部件。

公开(公告)号：US20130314630A1

公开(公告)日：2013-11-28

申请号：US13936831

申请日：2013-07-08

Applicant: Samsung Display Co., Ltd.

Inventor： Hyuk-Jin KIM ,  Kyung-Wook KIM ,  Dong-Wuuk SEO

IPC: G02F1/133

CPC classification number: G02F1/13306 ,  G02F1/1345 ,  G02F1/136213 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2320/0223

Abstract: An array substrate includes a base substrate, a plurality of storage voltage lines, a plurality of connecting lines, and a common voltage applying section. Pixels are formed in regions defined by a plurality of gate lines extending along a first direction and data lines extending along a second direction. The connecting lines are connected to the storage voltage lines that are formed on adjacent pixels of pixels arranged in the second direction. The common voltage applying section applies a common voltage to the storage voltage lines that are formed in a portion of the pixels arranged in the first direction. Thus, a substantially uniform current may be applied to the display area to decrease the distortion of the common voltage, thereby increasing a liquid crystal display device's display quality.

Abstract translation: 阵列基板包括基底基板，多个存储电压线，多个连接线以及公共电压施加部。 像素形成在由沿着第一方向延伸的多个栅极线和沿着第二方向延伸的数据线限定的区域中。 连接线连接到形成在沿第二方向布置的像素的相邻像素上的存储电压线。 公共电压施加部分对形成在沿第一方向布置的像素的一部分中的存储电压线施加公共电压。 因此，可以向显示区域施加大致均匀的电流，以减小公共电压的失真，从而增加液晶显示装置的显示质量。