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    TEMPORAL CONSISTENCY VIA BACKBONE FEATURE FUSION FOR PIXEL-LEVEL PREDICTION TASKS
    1.
    发明申请
    TEMPORAL CONSISTENCY VIA BACKBONE FEATURE FUSION FOR PIXEL-LEVEL PREDICTION TASKS 有权

    公开(公告)号：US20250069247A1

    公开(公告)日：2025-02-27

    申请号：US18943520

    申请日：2024-11-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Haoyu REN ,  Mostafa EL-KHAMY ,  Jungwon LEE ,  Hai SU ,  Qingfeng LIU

    IPC: G06T7/579 ,  G06T3/18 ,  G06T7/194

    Abstract: Methods and systems for performing video prediction, including obtaining an input frame from among a plurality of frames included in an input video; extracting a first feature map by providing the input frame to a first plurality of feature extraction layers and a first strided convolutional layer included in an encoder; providing the first feature map and at least one neighboring first feature map corresponding to at least one neighboring frame to a first fusion module included in the encoder; fusing the first feature map with the at least one neighboring first feature map to generate a fused first feature map using the first fusion module; generating a prediction corresponding to the input frame based on the fused first feature map using a decoder; and performing a video prediction task using the prediction.

    ELECTRONIC DEVICE FOR PROCESSING IMAGE AND IMAGE PROCESSING METHOD THEREOF
    5.
    发明申请
    ELECTRONIC DEVICE FOR PROCESSING IMAGE AND IMAGE PROCESSING METHOD THEREOF 审中-公开

    公开(公告)号：US20200265561A1

    公开(公告)日：2020-08-20

    申请号：US16794583

    申请日：2020-02-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sanguk PARK ,  Bongsoo JUNG ,  Changho KIM ,  Jungwon LEE ,  Donghyun YEOM

    IPC: G06T5/00

    Abstract: Disclosed is an electronic device including a memory and a processor electrically connected with the memory. The memory stores instructions that, when executed, cause the processor to control the electronic device to: obtain information about a maximum value of brightness of image content based on metadata of the image content, to perform tone mapping on at least one or more frames corresponding to a preview image of the image content based on the information about the maximum value of the brightness, and to output the preview image based on the at least one or more frames on which the tone mapping is performed, on a display device.

    EFFICIENT POLYPHASE ARCHITECTURE FOR INTERPOLATOR AND DECIMATOR
    6.
    发明申请
    EFFICIENT POLYPHASE ARCHITECTURE FOR INTERPOLATOR AND DECIMATOR 审中-公开

    公开(公告)号：US20200052726A1

    公开(公告)日：2020-02-13

    申请号：US16656971

    申请日：2019-10-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Liangbin LI ,  Pranav DAYAL ,  Jungwon LEE ,  Gennady FEYGIN

    IPC: H04B1/00 ,  H04B3/462

    Abstract: Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

    SYSTEM AND METHODS FOR LOW COMPLEXITY LIST DECODING OF TURBO CODES AND CONVOLUTIONAL CODES
    7.
    发明申请
    SYSTEM AND METHODS FOR LOW COMPLEXITY LIST DECODING OF TURBO CODES AND CONVOLUTIONAL CODES 审中-公开

    公开(公告)号：US20190173498A1

    公开(公告)日：2019-06-06

    申请号：US16272722

    申请日：2019-02-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Mostafa EL-KHAMY ,  Jinhong WU ,  Jungwon LEE ,  Inyup KANG

    IPC: H03M13/39 ,  G06F11/10

    Abstract: Method for decoding signal includes receiving signal, where signal includes at least one symbol; decoding signal in stages, where each at least one symbol of signal is decoded into at least one bit per stage, wherein Log-Likelihood Ratio (LLR) for each at least one bit at each stage is determined, and identified in vector LAPP; performing Cyclic Redundancy Check (CRC) on LAPP, and stopping if LAPP passes CRC; otherwise, determining magnitudes of LLRs in LAPP; identifying K LLRs in LAPP with smallest magnitudes and indexing K LLRs as r={r(1), r(2), . . . , r(K)}; setting Lmax to maximum magnitude of LLRs in LAPP or maximum possible LLR quantization value; setting v=1; generating {tilde over (L)}A(r(k))=LA(r(k))−Lmaxvksign[LAPP(r(k))], for k=1, 2, . . . , K; decoding with {tilde over (L)}A to identify {tilde over (L)}APP, wherein {tilde over (L)}APP is LLR vector; and performing CRC on {tilde over (L)}APP, and stopping if {tilde over (L)}APP passes CRC or v=2K-1; otherwise, incrementing v and returning to generating {tilde over (L)}A(r(k)).

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