公开(公告)号：US20180115329A1

公开(公告)日：2018-04-26

申请号：US15402651

申请日：2017-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Liangbin LI ,  Pranav DAYAL ,  Jungwon LEE ,  Gennady FEYGIN

IPC: H04B1/00 ,  H04B3/462

CPC classification number: H04B1/0042 ,  H04B1/0046 ,  H04B3/462

Abstract: Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

公开(公告)号：US20200052726A1

公开(公告)日：2020-02-13

申请号：US16656971

申请日：2019-10-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Liangbin LI ,  Pranav DAYAL ,  Jungwon LEE ,  Gennady FEYGIN

IPC: H04B1/00 ,  H04B3/462

Abstract: Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

公开(公告)号：US20180254785A1

公开(公告)日：2018-09-06

申请号：US15974218

申请日：2018-05-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Liangbin LI ,  Pranav Dayal ,  Jungwon Lee ,  Gennady Feygin

IPC: H04B1/00 ,  H04B3/462

CPC classification number: H04B1/0042 ,  H04B1/0046 ,  H04B3/462

Abstract: Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

公开(公告)号：US20210211144A1

公开(公告)日：2021-07-08

申请号：US17155723

申请日：2021-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Liangbin LI ,  Pranav DAYAL ,  Jungwon LEE ,  Gennady FEYGIN

IPC: H04B1/00 ,  H04B3/462

Abstract: Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

公开(公告)号：US20200336117A1

公开(公告)日：2020-10-22

申请号：US16752017

申请日：2020-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Liangbin LI ,  Gennady FEYGIN ,  Pranav DAYAL

IPC: H03F1/32 ,  H04B1/04 ,  H04W52/42 ,  H03F3/21 ,  H03F1/02 ,  H03F3/24

Abstract: A method and an apparatus are provided for calibrating digital pre-distortion (DPD) of an electronic device. A respective signal is received, by each of a first plurality of receiving antennas, from each of a second plurality of transmitting antennas. A DPD function is determined for each of the second plurality of transmitting antennas based on the received signals. A combined DPD function of the second plurality of transmitting antennas is determined based on the DPD functions and phase shifter settings associated with the second plurality of transmitting antennas.