SYSTEM AND METHOD FOR FRAME BUFFER
    2.
    发明申请

    公开(公告)号:US20190155727A1

    公开(公告)日:2019-05-23

    申请号:US16107652

    申请日:2018-08-21

    Abstract: A method for implementing a shared memory buffer includes at an apparatus comprising a processor and a physical memory, running a host environment with a host virtual memory. The method further includes running a guest environment with a guest virtual memory, performing, by the host environment, an allocation of a frame buffer in the physical memory, and mapping the allocated frame buffer into the host virtual memory. Additionally, the method includes passing a handle of the allocated frame buffer to the guest environment and performing a mapping of the allocated frame buffer into the guest virtual memory, the mapping based on the handle of the allocated frame buffer.

    SYSTEM AND METHOD FOR RESOURCE ACCESS AUTHENTICATION

    公开(公告)号:US20190342298A1

    公开(公告)日:2019-11-07

    申请号:US16399865

    申请日:2019-04-30

    Abstract: A method of providing continuous user authentication for resource access control includes launching a continuous authentication service at a boot time of a first device, wherein the first device includes a processor, a memory, and one or more sensors configured to collect authentication information. Additionally, the method includes receiving authentication information comprising one or more of explicit authentication information or implicit authentication information, and receiving a request for access to a resource of the first device. Further, the method includes the operations of determining, by the continuous authentication service, a current value of a security state, the current value of the security state based in part on a time interval between a receipt time of the authentication information and a current time and controlling access to the resource based on the current value of the security state.

    Method and apparatus for performing protected walk-based shadow paging using multiple stages of page tables

    公开(公告)号:US10019583B2

    公开(公告)日:2018-07-10

    申请号:US15089376

    申请日:2016-04-01

    Abstract: A Protected Walk-based Shadow Paging (PWSP) method includes storing a multiple level first stage (S1) page tables structure in second stage (S2) page tables. The method includes: when an S1 page table in an S2 page table entry is marked with a writable attribute: (i) permitting an operating system (OS) to write to the S1 page table, (ii) blocking a memory management unit (MMU) from reading the S1 page table for translation, and (iii) in response, verifying the S1 page table for translation and changing the marking of the S1 page table in the S2 page table entry to a read-only attribute, enabling the MMU to subsequently read the S1 page table. The method further includes: when the S1 page table in the S2 page table entry is marked with the read-only attribute: (i) permitting the OS to read the S1 page table for translating from a virtual address to an intermediate physical address, (ii) blocking the OS from writing to the S1 page table, and (iii) in response to blocking the OS, updating the S1 page table and changing the marking of the S1 page table in the S2 page table entry to the device memory attribute, enabling the OS to write to the S1 page table. Blocking the MMU from reading the S1 page table for translation may include generating a device memory permissions fault, and blocking the OS from writing to the S1 page table may include generating a read-only prefetch permissions fault.

Patent Agency Ranking