Feed forward equalizer and system including the same

    公开(公告)号:US12119963B2

    公开(公告)日:2024-10-15

    申请号:US18144331

    申请日:2023-05-08

    CPC classification number: H04L25/03006 H04L25/062 H04L2025/03471

    Abstract: A feed forward equalizer includes a plurality of delay circuits connected to each other in series and configured to delay input signals. A plurality of filters respectively correspond to outputs of the plurality of delay circuits, except for a reference output which is an output of a first delay circuit among the plurality of delay circuits, and the input signals. A calculator configured to sum the reference output and outputs of the plurality of filters. Each of the plurality of filters is configured to receive an output of a delay circuit corresponding thereto, among the plurality of filters, and the reference output.

    Transmitting device and receiving device providing relaxed impedance matching

    公开(公告)号:US10523340B2

    公开(公告)日:2019-12-31

    申请号:US16235053

    申请日:2018-12-28

    Abstract: Provided are a transmitting device connected to a receiving device via a channel and the receiving device connected to the transmitting device via a channel. The transmitting device connected to a receiving device includes: a transmitter connected to the channel via an output node and configured to transmit, via the channel, a transmission signal to the receiving device, the transmitter having a transmission impedance associated therewith that is variable; and a monitoring device configured to detect a channel impedance of the channel and a receiving impedance of the receiving device by monitoring a voltage level of the output node, the monitoring device configured to set the transmission impedance based on the channel impedance and the receiving impedance.

    TRANSMITTING DEVICE AND RECEIVING DEVICE PROVIDING RELAXED IMPEDANCE MATCHING

    公开(公告)号:US20190372681A1

    公开(公告)日:2019-12-05

    申请号:US16235053

    申请日:2018-12-28

    Abstract: Provided are a transmitting device connected to a receiving device via a channel and the receiving device connected to the transmitting device via a channel. The transmitting device connected to a receiving device includes: a transmitter connected to the channel via an output node and configured to transmit, via the channel, a transmission signal to the receiving device, the transmitter having a transmission impedance associated therewith that is variable; and a monitoring device configured to detect a channel impedance of the channel and a receiving impedance of the receiving device by monitoring a voltage level of the output node, the monitoring device configured to set the transmission impedance based on the channel impedance and the receiving impedance.

    SYSTEM FOR TRANSCEIVING DATA BASED ON CLOCK TRANSITION TIME

    公开(公告)号:US20190354133A1

    公开(公告)日:2019-11-21

    申请号:US16413212

    申请日:2019-05-15

    Abstract: A system for transceiving data based on a clock transition time is provided. A transmitting device included in the system includes at least one first transmitting circuit configured to transmit data via a wired channel by changing a clock transition time based on the data, wherein the at least one first transmitting circuit includes a skew controller configured to output a skew clock generated by controlling a duty ratio and a skew of an input clock, and a phase-difference modulator configured to output a transmission signal including information about the data generated by changing a transition time of the skew clock based on the data.

    System for transceiving data based on clock transition time

    公开(公告)号:US11221644B2

    公开(公告)日:2022-01-11

    申请号:US16413212

    申请日:2019-05-15

    Abstract: A system for transceiving data based on a clock transition time is provided. A transmitting device included in the system includes at least one first transmitting circuit configured to transmit data via a wired channel by changing a clock transition time based on the data, wherein the at least one first transmitting circuit includes a skew controller configured to output a skew clock generated by controlling a duty ratio and a skew of an input clock, and a phase-difference modulator configured to output a transmission signal including information about the data generated by changing a transition time of the skew clock based on the data.

Patent Agency Ranking